Searched refs:CS4281_HICR (Results 1 – 2 of 2) sorted by relevance
| /netbsd-src/sys/dev/pci/ |
| H A D | cs4281.c | 323 BA0WRITE4(sc, CS4281_HICR, HICR_CHGM | HICR_IEV); in cs4281_intr()
333 BA0WRITE4(sc, CS4281_HICR, HICR_CHGM | HICR_IEV); in cs4281_intr()
519 BA0WRITE4(sc, CS4281_HICR, HICR_IEV | HICR_CHGM); in cs4281_trigger_output()
521 DPRINTF(("HICR =0x%08x(expected 0x00000001)\n", BA0READ4(sc, CS4281_HICR))); in cs4281_trigger_output()
599 BA0WRITE4(sc, CS4281_HICR, HICR_IEV | HICR_CHGM); in cs4281_trigger_input()
601 DPRINTF(("HICR=0x%08x\n", BA0READ4(sc, CS4281_HICR))); in cs4281_trigger_input()
675 BA0WRITE4(sc, CS4281_HICR, HICR_IEV | HICR_CHGM); in cs4281_resume()
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| H A D | cs4281reg.h | 61 #define CS4281_HICR 0x008 /* Host Interrupt Control Register */ macro
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