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Searched refs:CP_RB0_CNTL__CACHE_POLICY__SHIFT (Results 1 – 8 of 8) sorted by relevance

/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h2715 #define CP_RB0_CNTL__CACHE_POLICY__SHIFT 0x00000018 macro
H A Dgfx_7_2_sh_mask.h1054 #define CP_RB0_CNTL__CACHE_POLICY__SHIFT 0x18 macro
H A Dgfx_8_1_sh_mask.h1896 #define CP_RB0_CNTL__CACHE_POLICY__SHIFT 0x18 macro
H A Dgfx_8_0_sh_mask.h1372 #define CP_RB0_CNTL__CACHE_POLICY__SHIFT 0x18 macro
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h10697 #define CP_RB0_CNTL__CACHE_POLICY__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h11983 #define CP_RB0_CNTL__CACHE_POLICY__SHIFT … macro
H A Dgc_9_1_sh_mask.h12178 #define CP_RB0_CNTL__CACHE_POLICY__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h17598 #define CP_RB0_CNTL__CACHE_POLICY__SHIFT … macro