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Searched refs:CPU_CONTROL_WBUF_ENABLE (Results 1 – 10 of 10) sorted by relevance

/netbsd-src/sys/arch/arm/arm/
H A Dcpufunc.c2409 { "nowritebuf", IGN, BIC, CPU_CONTROL_WBUF_ENABLE },
2413 { "cpu.writebuf", BIC, OR, CPU_CONTROL_WBUF_ENABLE },
2414 { "cpu.nowritebuf", OR, BIC, CPU_CONTROL_WBUF_ENABLE },
2424 { "arm6.writebuf", BIC, OR, CPU_CONTROL_WBUF_ENABLE },
2425 { "arm6.nowritebuf", OR, BIC, CPU_CONTROL_WBUF_ENABLE },
2436 | CPU_CONTROL_IDC_ENABLE | CPU_CONTROL_WBUF_ENABLE; in arm6_setup()
2440 | CPU_CONTROL_IDC_ENABLE | CPU_CONTROL_WBUF_ENABLE in arm6_setup()
2472 { "arm7.writebuf", BIC, OR, CPU_CONTROL_WBUF_ENABLE },
2473 { "arm7.nowritebuf", OR, BIC, CPU_CONTROL_WBUF_ENABLE },
2487 | CPU_CONTROL_IDC_ENABLE | CPU_CONTROL_WBUF_ENABLE; in arm7_setup()
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H A Darmv6_start.S1112 CPU_CONTROL_WBUF_ENABLE | /* not defined in 1176 (SBO) */ \
/netbsd-src/sys/arch/evbarm/ixm1200/
H A Dixm1200_start.S66 orr r0, r0, #CPU_CONTROL_WBUF_ENABLE
/netbsd-src/sys/arch/evbarm/armadaxp/
H A Darmadaxp_start.S74 CPU_CONTROL_WBUF_ENABLE | CPU_CONTROL_IC_ENABLE |\
/netbsd-src/sys/arch/evbarm/marvell/
H A Dmarvell_start.S244 biceq r0, r0, #(CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_DC_ENABLE | CPU_CONTROL_WBUF_ENABLE)
/netbsd-src/sys/arch/acorn32/stand/boot32/
H A Dstart.S152 orr r0, r0, #CPU_CONTROL_WBUF_ENABLE | CPU_CONTROL_DC_ENABLE | CPU_CONTROL_MMU_ENABLE
/netbsd-src/sys/arch/epoc32/epoc32/
H A Depoc32_start.S238 CPU_CONTROL_WBUF_ENABLE | \
/netbsd-src/sys/arch/evbarm/gemini/
H A Dgemini_start.S317 CPU_CONTROL_WBUF_ENABLE | \
/netbsd-src/sys/arch/arm/arm32/
H A Dcpu.c751 if ((ci->ci_ctrl & CPU_CONTROL_WBUF_ENABLE) == 0) in identify_arm_cpu()
/netbsd-src/sys/arch/arm/include/
H A Darmreg.h189 #define CPU_CONTROL_WBUF_ENABLE 0x00000008 /* W: Write buffer enable */ macro