/netbsd-src/external/gpl3/binutils.old/dist/opcodes/ |
H A D | or1k-opinst.c | 39 #define COND_REF CGEN_OPINST_COND_REF macro 84 { INPUT, "disp26", HW_H_IADDR, CGEN_MODE_USI, OP_ENT (DISP26), 0, COND_REF }, 85 { INPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, COND_REF }, 86 { INPUT, "sys_cpucfgr_nd", HW_H_SYS_CPUCFGR_ND, CGEN_MODE_USI, 0, 0, COND_REF }, 88 { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, COND_REF }, 197 { OUTPUT, "atomic_reserve", HW_H_ATOMIC_RESERVE, CGEN_MODE_BI, 0, 0, COND_REF }, 207 { OUTPUT, "atomic_reserve", HW_H_ATOMIC_RESERVE, CGEN_MODE_BI, 0, 0, COND_REF }, 217 { OUTPUT, "atomic_reserve", HW_H_ATOMIC_RESERVE, CGEN_MODE_BI, 0, 0, COND_REF }, 226 { INPUT, "rB", HW_H_GPR, CGEN_MODE_USI, OP_ENT (RB), 0, COND_REF }, 230 { OUTPUT, "h_memory_USI_addr", HW_H_MEMORY, CGEN_MODE_USI, 0, 0, COND_REF }, [all …]
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H A D | m32r-opinst.c | 39 #define COND_REF CGEN_OPINST_COND_REF macro 107 { INPUT, "disp8", HW_H_IADDR, CGEN_MODE_USI, OP_ENT (DISP8), 0, COND_REF }, 108 { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, COND_REF }, 114 { INPUT, "disp24", HW_H_IADDR, CGEN_MODE_USI, OP_ENT (DISP24), 0, COND_REF }, 115 { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, COND_REF }, 120 { INPUT, "disp16", HW_H_IADDR, CGEN_MODE_USI, OP_ENT (DISP16), 0, COND_REF }, 123 { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, COND_REF }, 128 { INPUT, "disp16", HW_H_IADDR, CGEN_MODE_USI, OP_ENT (DISP16), 0, COND_REF }, 130 { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, COND_REF }, 152 { INPUT, "disp8", HW_H_IADDR, CGEN_MODE_USI, OP_ENT (DISP8), 0, COND_REF }, [all …]
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H A D | lm32-opinst.c | 39 #define COND_REF CGEN_OPINST_COND_REF macro 87 { INPUT, "branch", HW_H_IADDR, CGEN_MODE_USI, OP_ENT (BRANCH), 0, COND_REF }, 90 { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, COND_REF }, 367 #undef COND_REF
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/netbsd-src/external/gpl3/binutils/dist/opcodes/ |
H A D | or1k-opinst.c | 39 #define COND_REF CGEN_OPINST_COND_REF macro 84 { INPUT, "disp26", HW_H_IADDR, CGEN_MODE_USI, OP_ENT (DISP26), 0, COND_REF }, 85 { INPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, COND_REF }, 86 { INPUT, "sys_cpucfgr_nd", HW_H_SYS_CPUCFGR_ND, CGEN_MODE_USI, 0, 0, COND_REF }, 88 { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, COND_REF }, 197 { OUTPUT, "atomic_reserve", HW_H_ATOMIC_RESERVE, CGEN_MODE_BI, 0, 0, COND_REF }, 207 { OUTPUT, "atomic_reserve", HW_H_ATOMIC_RESERVE, CGEN_MODE_BI, 0, 0, COND_REF }, 217 { OUTPUT, "atomic_reserve", HW_H_ATOMIC_RESERVE, CGEN_MODE_BI, 0, 0, COND_REF }, 226 { INPUT, "rB", HW_H_GPR, CGEN_MODE_USI, OP_ENT (RB), 0, COND_REF }, 230 { OUTPUT, "h_memory_USI_addr", HW_H_MEMORY, CGEN_MODE_USI, 0, 0, COND_REF }, [all …]
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H A D | m32r-opinst.c | 39 #define COND_REF CGEN_OPINST_COND_REF macro 107 { INPUT, "disp8", HW_H_IADDR, CGEN_MODE_USI, OP_ENT (DISP8), 0, COND_REF }, 108 { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, COND_REF }, 114 { INPUT, "disp24", HW_H_IADDR, CGEN_MODE_USI, OP_ENT (DISP24), 0, COND_REF }, 115 { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, COND_REF }, 120 { INPUT, "disp16", HW_H_IADDR, CGEN_MODE_USI, OP_ENT (DISP16), 0, COND_REF }, 123 { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, COND_REF }, 128 { INPUT, "disp16", HW_H_IADDR, CGEN_MODE_USI, OP_ENT (DISP16), 0, COND_REF }, 130 { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, COND_REF }, 152 { INPUT, "disp8", HW_H_IADDR, CGEN_MODE_USI, OP_ENT (DISP8), 0, COND_REF }, [all …]
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H A D | lm32-opinst.c | 39 #define COND_REF CGEN_OPINST_COND_REF macro 87 { INPUT, "branch", HW_H_IADDR, CGEN_MODE_USI, OP_ENT (BRANCH), 0, COND_REF }, 90 { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, COND_REF }, 367 #undef COND_REF
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