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Searched refs:CH_MR (Results 1 – 4 of 4) sorted by relevance

/netbsd-src/sys/arch/sgimips/dev/
H A Dscn.c440 mr0a = dp->base[CH_MR]; in scn_setchip()
444 dp->base[CH_MR] = nmr0a; in scn_setchip()
452 mr0b = dp->base[CH_MR]; in scn_setchip()
457 sc->sc_chbase[CH_MR] = dp->chan[chan].mr0; in scn_setchip()
465 mr1 = sc->sc_chbase[CH_MR]; in scn_setchip()
466 mr2 = sc->sc_chbase[CH_MR]; in scn_setchip()
471 sc->sc_chbase[CH_MR] = dp->chan[chan].new_mr1; in scn_setchip()
472 sc->sc_chbase[CH_MR] = dp->chan[chan].new_mr2; in scn_setchip()
852 mr1 = ch_base[CH_MR]; in scn_attach()
853 mr2 = ch_base[CH_MR]; in scn_attach()
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H A Dscnreg.h42 #define CH_MR SCN_REG(0) /* rw mode register */ macro
/netbsd-src/sys/arch/vax/uba/
H A Dqvareg.h44 #define CH_MR(x) SCN_REG(0 + 8*(x)) /* rw mode register */ macro
H A Dqvaux.c286 sc->sc_qr.qr_ch_regs[0].qr_mr = CH_MR(0); in qvaux_attach()
291 sc->sc_qr.qr_ch_regs[1].qr_mr = CH_MR(1); in qvaux_attach()