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Searched refs:CAI_L3CACHE (Results 1 – 4 of 4) sorted by relevance

/netbsd-src/sys/arch/x86/include/
H A Dcacheinfo.h27 #define CAI_L3CACHE 7 /* Level 3 cache */ macro
269 __CI_TBL(CAI_L3CACHE, 0x22, 0xff, 512 * 1024, 64, "sectored, 4-way "), \
270 __CI_TBL(CAI_L3CACHE, 0x23, 0xff, 1 * 1024 * 1024, 64, "sectored, 8-way "), \
272 __CI_TBL(CAI_L3CACHE, 0x25, 0xff, 2 * 1024 * 1024, 64, "sectored, 8-way "), \
273 __CI_TBL(CAI_L3CACHE, 0x29, 0xff, 4 * 1024 * 1024, 64, "sectored, 8-way "), \
288 __CI_TBL(CAI_L3CACHE, 0x46, 4, 4 * 1024 * 1024, 64, NULL), \
289 __CI_TBL(CAI_L3CACHE, 0x47, 8, 8 * 1024 * 1024, 64, NULL), \
294 __CI_TBL(CAI_L3CACHE, 0x49, 16, 4 * 1024 * 1024, 64, NULL), \
295 __CI_TBL(CAI_L3CACHE, 0x4a, 12, 6 * 1024 * 1024, 64, NULL), \
296 __CI_TBL(CAI_L3CACHE, 0x4b, 16, 8 * 1024 * 1024, 64, NULL), \
[all …]
/netbsd-src/sys/arch/x86/x86/
H A Didentcpu_subr.c198 caitype = CAI_L3CACHE; in cpu_dcp_cacheinfo()
H A Didentcpu.c268 cai = &ci->ci_cinfo[CAI_L3CACHE]; in cpu_probe_amd_cache()
/netbsd-src/usr.sbin/cpuctl/arch/
H A Di386.c1128 caitype = CAI_L3CACHE; in intel_cpu_cacheinfo()
1310 cai = &ci->ci_cinfo[CAI_L3CACHE]; in amd_cpu_cacheinfo()
2520 if (ci->ci_cinfo[CAI_L3CACHE].cai_totalsize != 0) { in x86_print_cache_and_tlb_info()
2521 sep = print_cache_config(ci, CAI_L3CACHE, "L3 cache:", NULL); in x86_print_cache_and_tlb_info()