| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | SIInsertHardClauses.cpp | 118 SmallVector<const MachineOperand *, 4> BaseOps; member
159 SmallVector<const MachineOperand *, 4> BaseOps; in runOnMachineFunction() local
161 if (!SII->getMemOperandsWithOffsetWidth(MI, BaseOps, Dummy1, Dummy2, in runOnMachineFunction()
177 !SII->shouldClusterMemOps(CI.BaseOps, BaseOps, 2, 2)))) { in runOnMachineFunction()
188 CI.BaseOps = std::move(BaseOps); in runOnMachineFunction()
192 CI = ClauseInfo{Type, &MI, &MI, 1, std::move(BaseOps)}; in runOnMachineFunction()
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| H A D | SIInstrInfo.cpp | 245 const MachineInstr &LdSt, SmallVectorImpl<const MachineOperand *> &BaseOps, in getMemOperandsWithOffsetWidth() argument
266 BaseOps.push_back(BaseOp); in getMemOperandsWithOffsetWidth()
302 BaseOps.push_back(BaseOp); in getMemOperandsWithOffsetWidth()
322 BaseOps.push_back(RSrc); in getMemOperandsWithOffsetWidth()
325 BaseOps.push_back(BaseOp); in getMemOperandsWithOffsetWidth()
333 BaseOps.push_back(SOffset); in getMemOperandsWithOffsetWidth()
347 BaseOps.push_back(&LdSt.getOperand(SRsrcIdx)); in getMemOperandsWithOffsetWidth()
352 BaseOps.push_back(&LdSt.getOperand(I)); in getMemOperandsWithOffsetWidth()
354 BaseOps.push_back(getNamedOperand(LdSt, AMDGPU::OpName::vaddr)); in getMemOperandsWithOffsetWidth()
367 BaseOps.push_back(BaseOp); in getMemOperandsWithOffsetWidth()
[all …]
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| H A D | SIInstrInfo.h | 190 SmallVectorImpl<const MachineOperand *> &BaseOps, int64_t &Offset,
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| H A D | MachineScheduler.cpp | 1491 SmallVector<const MachineOperand *, 4> BaseOps; member
1495 MemOpInfo(SUnit *SU, ArrayRef<const MachineOperand *> BaseOps, in MemOpInfo()
1497 : SU(SU), BaseOps(BaseOps.begin(), BaseOps.end()), Offset(Offset), in MemOpInfo()
1522 if (std::lexicographical_compare(BaseOps.begin(), BaseOps.end(), in operator <()
1523 RHS.BaseOps.begin(), RHS.BaseOps.end(), in operator <()
1526 if (std::lexicographical_compare(RHS.BaseOps.begin(), RHS.BaseOps.end(), in operator <()
1527 BaseOps.begin(), BaseOps.end(), Compare)) in operator <()
1627 if (!TII->shouldClusterMemOps(MemOpa.BaseOps, MemOpb.BaseOps, ClusterLength, in clusterNeighboringMemOps()
1689 SmallVector<const MachineOperand *, 4> BaseOps; in collectMemOpRecords() local
1693 if (TII->getMemOperandsWithOffsetWidth(MI, BaseOps, Offset, in collectMemOpRecords()
[all …]
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| H A D | TargetInstrInfo.cpp | 1074 SmallVector<const MachineOperand *, 4> BaseOps; in getMemOperandWithOffset() local
1076 if (!getMemOperandsWithOffsetWidth(MI, BaseOps, Offset, OffsetIsScalable, in getMemOperandWithOffset()
1078 BaseOps.size() != 1) in getMemOperandWithOffset()
1080 BaseOp = BaseOps.front(); in getMemOperandWithOffset()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/ |
| H A D | LanaiInstrInfo.h | 72 SmallVectorImpl<const MachineOperand *> &BaseOps, int64_t &Offset,
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| H A D | LanaiInstrInfo.cpp | 799 const MachineInstr &LdSt, SmallVectorImpl<const MachineOperand *> &BaseOps, in getMemOperandsWithOffsetWidth() argument
818 BaseOps.push_back(BaseOp); in getMemOperandsWithOffsetWidth()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| H A D | HexagonInstrInfo.h | 209 SmallVectorImpl<const MachineOperand *> &BaseOps, int64_t &Offset,
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| H A D | HexagonInstrInfo.cpp | 2974 const MachineInstr &LdSt, SmallVectorImpl<const MachineOperand *> &BaseOps, in getMemOperandsWithOffsetWidth() argument
2981 BaseOps.push_back(BaseOp); in getMemOperandsWithOffsetWidth()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.h | 128 const MachineInstr &MI, SmallVectorImpl<const MachineOperand *> &BaseOps,
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| H A D | AArch64InstrInfo.cpp | 2514 const MachineInstr &LdSt, SmallVectorImpl<const MachineOperand *> &BaseOps, in getMemOperandsWithOffsetWidth() argument
2524 BaseOps.push_back(BaseOp); in getMemOperandsWithOffsetWidth()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.h | 333 SmallVectorImpl<const MachineOperand *> &BaseOps, int64_t &Offset,
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| H A D | X86InstrInfo.cpp | 3736 const MachineInstr &MemOp, SmallVectorImpl<const MachineOperand *> &BaseOps, in getMemOperandsWithOffsetWidth() argument
3775 BaseOps.push_back(BaseOp); in getMemOperandsWithOffsetWidth()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.h | 541 SmallVectorImpl<const MachineOperand *> &BaseOps, int64_t &Offset,
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| H A D | PPCInstrInfo.cpp | 2737 const MachineInstr &LdSt, SmallVectorImpl<const MachineOperand *> &BaseOps, in getMemOperandsWithOffsetWidth() argument
2744 BaseOps.push_back(BaseOp); in getMemOperandsWithOffsetWidth()
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| H A D | TargetInstrInfo.h | 1332 const MachineInstr &MI, SmallVectorImpl<const MachineOperand *> &BaseOps, in getMemOperandsWithOffsetWidth() argument
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGBuilder.cpp | 3254 SmallVector<SDValue, 1> BaseOps(1, Cond); in visitSelect() local
3345 BaseOps.clear(); in visitSelect()
3351 BaseOps.clear(); in visitSelect()
3367 SmallVector<SDValue, 3> Ops(BaseOps.begin(), BaseOps.end()); in visitSelect()
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