| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86FastISel.cpp | 3311 unsigned ArgReg = ArgRegs[VA.getValNo()]; in fastLowerCall() local
3323 bool Emitted = X86FastEmitExtend(ISD::SIGN_EXTEND, VA.getLocVT(), ArgReg, in fastLowerCall()
3324 ArgVT, ArgReg); in fastLowerCall()
3336 ArgReg = fastEmitZExtFromI1(MVT::i8, ArgReg); in fastLowerCall()
3339 if (ArgReg == 0) in fastLowerCall()
3343 bool Emitted = X86FastEmitExtend(ISD::ZERO_EXTEND, VA.getLocVT(), ArgReg, in fastLowerCall()
3344 ArgVT, ArgReg); in fastLowerCall()
3352 bool Emitted = X86FastEmitExtend(ISD::ANY_EXTEND, VA.getLocVT(), ArgReg, in fastLowerCall()
3353 ArgVT, ArgReg); in fastLowerCall()
3355 Emitted = X86FastEmitExtend(ISD::ZERO_EXTEND, VA.getLocVT(), ArgReg, in fastLowerCall()
[all …]
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUCallLowering.cpp | 548 Register ArgReg = in lowerFormalArgumentsKernel() local
553 lowerParameter(B, ArgTy, ArgOffset, Alignment, ArgReg); in lowerFormalArgumentsKernel()
555 unpackRegs(OrigArgRegs, ArgReg, ArgTy, B); in lowerFormalArgumentsKernel()
1096 for (std::pair<MCRegister, Register> ArgReg : ImplicitArgRegs) { in handleImplicitCallArguments()
1097 MIRBuilder.buildCopy((Register)ArgReg.first, ArgReg.second); in handleImplicitCallArguments()
1098 CallInst.addReg(ArgReg.first, RegState::Implicit); in handleImplicitCallArguments()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
| H A D | MipsFastISel.cpp | 1199 unsigned ArgReg = getRegForValue(ArgVal); in processCallArgs() local
1200 if (!ArgReg) in processCallArgs()
1211 ArgReg = emitIntExt(SrcVT, ArgReg, DestVT, /*isZExt=*/false); in processCallArgs()
1212 if (!ArgReg) in processCallArgs()
1219 ArgReg = emitIntExt(SrcVT, ArgReg, DestVT, /*isZExt=*/true); in processCallArgs()
1220 if (!ArgReg) in processCallArgs()
1231 TII.get(TargetOpcode::COPY), VA.getLocReg()).addReg(ArgReg); in processCallArgs()
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| H A D | MipsISelLowering.cpp | 3665 Register ArgReg = VA.getLocReg(); in LowerFormalArguments() local
3670 unsigned Reg = addLiveIn(DAG.getMachineFunction(), ArgReg, RC); in LowerFormalArguments()
3684 getNextIntArgReg(ArgReg), RC); in LowerFormalArguments()
4356 unsigned ArgReg = ByValArgRegs[FirstReg + I]; in copyByValRegs() local
4357 unsigned VReg = addLiveIn(MF, ArgReg, RC); in copyByValRegs()
4396 unsigned ArgReg = ArgRegs[FirstReg + I]; in passByValArg() local
4397 RegsToPass.push_back(std::make_pair(ArgReg, LoadVal)); in passByValArg()
4445 unsigned ArgReg = ArgRegs[FirstReg + I]; in passByValArg() local
4446 RegsToPass.push_back(std::make_pair(ArgReg, Val)); in passByValArg()
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| H A D | MIRYamlMapping.h | 462 static void mapping(IO &YamlIO, CallSiteInfo::ArgRegPair &ArgReg) {
463 YamlIO.mapRequired("arg", ArgReg.ArgNo);
464 YamlIO.mapRequired("reg", ArgReg.Reg);
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| H A D | MIRPrinter.cpp | 510 for (auto ArgReg : CSInfo.second) { in convertCallSiteObjects() local
512 YmlArgReg.ArgNo = ArgReg.ArgNo; in convertCallSiteObjects()
513 printRegMIR(ArgReg.Reg, YmlArgReg.Reg, TRI); in convertCallSiteObjects()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | Thumb1FrameLowering.cpp | 844 for (unsigned ArgReg : {ARM::R0, ARM::R1, ARM::R2, ARM::R3}) in spillCalleeSavedRegisters()
845 if (!MF.getRegInfo().isLiveIn(ArgReg)) in spillCalleeSavedRegisters()
846 CopyRegs[ArgReg] = true; in spillCalleeSavedRegisters()
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCFastISel.cpp | 1470 unsigned ArgReg; in processCallArgs() local
1472 ArgReg = NextFPR++; in processCallArgs()
1476 ArgReg = NextGPR++; in processCallArgs()
1479 TII.get(TargetOpcode::COPY), ArgReg).addReg(Arg); in processCallArgs()
1480 RegArgs.push_back(ArgReg); in processCallArgs()
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| H A D | PPCISelLowering.cpp | 6977 const MCPhysReg ArgReg = VA.getLocReg(); in LowerFormalArguments_AIX() local
6985 StackSize, mapArgRegToOffsetAIX(ArgReg, FL), /* IsImmutable */ false, in LowerFormalArguments_AIX()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64FastISel.cpp | 3012 unsigned ArgReg = getRegForValue(ArgVal); in processCallArgs() local
3013 if (!ArgReg) in processCallArgs()
3023 ArgReg = emitIntExt(SrcVT, ArgReg, DestVT, /*isZExt=*/false); in processCallArgs()
3024 if (!ArgReg) in processCallArgs()
3033 ArgReg = emitIntExt(SrcVT, ArgReg, DestVT, /*isZExt=*/true); in processCallArgs()
3034 if (!ArgReg) in processCallArgs()
3045 TII.get(TargetOpcode::COPY), VA.getLocReg()).addReg(ArgReg); in processCallArgs()
3074 if (!emitStore(ArgVT, ArgReg, Addr, MMO)) in processCallArgs()
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| H A D | AArch64ISelLowering.cpp | 5756 llvm::erase_if(CSInfo, [&VA](MachineFunction::ArgRegPair ArgReg) { in LowerCall() argument
5757 return ArgReg.Reg == VA.getLocReg(); in LowerCall()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CallLowering.cpp | 674 Register ArgReg = Args[i].Regs[Part]; in handleAssignments() local
747 Handler.assignValueToReg(ArgReg, VA.getLocReg(), VA); in handleAssignments()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyFastISel.cpp | 897 for (unsigned ArgReg : Args) in selectCall() local
898 MIB.addReg(ArgReg); in selectCall()
|
| /netbsd-src/external/apache2/llvm/dist/clang/lib/StaticAnalyzer/Core/ |
| H A D | BugReporterVisitors.cpp | 2907 const MemRegion *ArgReg = Call->getArgSVal(Idx).getAsRegion(); in VisitNode() local
2911 if ( !ArgReg || !R->isSubRegionOf(ArgReg->StripCasts())) in VisitNode()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/AsmPrinter/ |
| H A D | DwarfDebug.cpp | 824 for (const auto &ArgReg : CallFwdRegsInfo->second) { in collectCallSiteParameters() local
826 ForwardedRegWorklist.insert({ArgReg.Reg, {{ArgReg.Reg, EmptyExpr}}}) in collectCallSiteParameters()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 98 Register ArgReg = cast<RegisterSDNode>(Value->getOperand(1))->getReg(); in parametersInCSRMatch() local
99 if (MRI.getLiveInPhysReg(ArgReg) != Reg) in parametersInCSRMatch()
|