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Searched refs:AllocationOrder (Results 1 – 9 of 9) sorted by relevance

/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/
H A DAllocationOrder.h30 class LLVM_LIBRARY_VISIBILITY AllocationOrder {
45 const AllocationOrder &AO;
49 Iterator(const AllocationOrder &AO, int Pos) : AO(AO), Pos(Pos) {} in Iterator()
84 static AllocationOrder create(unsigned VirtReg, const VirtRegMap &VRM,
90 AllocationOrder(SmallVector<MCPhysReg, 16> &&Hints, ArrayRef<MCPhysReg> Order, in AllocationOrder() function
H A DAllocationOrder.cpp29 AllocationOrder AllocationOrder::create(unsigned VirtReg, const VirtRegMap &VRM, in create()
52 return AllocationOrder(std::move(Hints), Order, HardHints); in create()
H A DRegAllocGreedy.cpp461 const AllocationOrder &Order);
464 const AllocationOrder &Order);
466 const AllocationOrder &Order,
478 MCRegister getCheapestEvicteeWeight(const AllocationOrder &Order,
488 MCRegister tryAssign(LiveInterval&, AllocationOrder&,
491 MCRegister tryEvict(LiveInterval &, AllocationOrder &,
494 MCRegister tryRegionSplit(LiveInterval &, AllocationOrder &,
498 AllocationOrder &Order,
509 AllocationOrder &Order, MCRegister PhysReg,
513 unsigned tryBlockSplit(LiveInterval&, AllocationOrder&,
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H A DRegisterScavenging.cpp361 const LiveRegUnits &LiveOut, ArrayRef<MCPhysReg> AllocationOrder, in findSurvivorBackwards() argument
383 for (MCPhysReg Reg : AllocationOrder) { in findSurvivorBackwards()
401 for (MCPhysReg Reg : AllocationOrder) { in findSurvivorBackwards()
575 ArrayRef<MCPhysReg> AllocationOrder = RC.getRawAllocationOrder(MF); in scavengeRegisterBackwards() local
577 findSurvivorBackwards(*MRI, MBBI, To, LiveUnits, AllocationOrder, in scavengeRegisterBackwards()
H A DRegAllocFast.cpp777 ArrayRef<MCPhysReg> AllocationOrder = RegClassInfo.getOrder(&RC); in allocVirtReg() local
778 for (MCPhysReg PhysReg : AllocationOrder) { in allocVirtReg()
830 ArrayRef<MCPhysReg> AllocationOrder = RegClassInfo.getOrder(&RC); in allocVirtRegUndef() local
831 assert(!AllocationOrder.empty() && "Allocation order must not be empty"); in allocVirtRegUndef()
832 PhysReg = AllocationOrder[0]; in allocVirtRegUndef()
961 ArrayRef<MCPhysReg> AllocationOrder = RegClassInfo.getOrder(&RC); in useVirtReg() local
962 setPhysReg(MI, MO, *AllocationOrder.begin()); in useVirtReg()
H A DCMakeLists.txt3 AllocationOrder.cpp
H A DRegAllocBasic.cpp268 AllocationOrder::create(VirtReg.reg(), *VRM, RegClassInfo, Matrix); in selectOrSplit()
/netbsd-src/external/apache2/llvm/lib/libLLVMCodeGen/
H A DMakefile11 AllocationOrder.cpp \
/netbsd-src/external/apache2/llvm/dist/llvm/utils/gn/secondary/llvm/lib/CodeGen/
H A DBUILD.gn21 "AllocationOrder.cpp",