| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86BaseInfo.h | 120 AddSub, enumerator
268 return FirstMacroFusionInstKind::AddSub; in classifyFirstOpcodeInMacroFusion()
345 case X86::FirstMacroFusionInstKind::AddSub: in isMacroFused()
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMISelDAGToDAG.cpp | 714 ARM_AM::AddrOpc AddSub = ARM_AM::add; in SelectLdStSOReg() local
716 AddSub = ARM_AM::sub; in SelectLdStSOReg()
722 Opc = CurDAG->getTargetConstant(ARM_AM::getAM2Opc(AddSub, ShAmt, in SelectLdStSOReg()
745 ARM_AM::AddrOpc AddSub = N.getOpcode() == ISD::SUB ? ARM_AM::sub:ARM_AM::add; in SelectLdStSOReg() local
808 Opc = CurDAG->getTargetConstant(ARM_AM::getAM2Opc(AddSub, ShAmt, ShOpcVal), in SelectLdStSOReg()
819 ARM_AM::AddrOpc AddSub = (AM == ISD::PRE_INC || AM == ISD::POST_INC) in SelectAddrMode2OffsetReg() local
844 Opc = CurDAG->getTargetConstant(ARM_AM::getAM2Opc(AddSub, ShAmt, ShOpcVal), in SelectAddrMode2OffsetReg()
855 ARM_AM::AddrOpc AddSub = (AM == ISD::PRE_INC || AM == ISD::POST_INC) in SelectAddrMode2OffsetImmPre() local
859 if (AddSub == ARM_AM::sub) Val *= -1; in SelectAddrMode2OffsetImmPre()
875 ARM_AM::AddrOpc AddSub = (AM == ISD::PRE_INC || AM == ISD::POST_INC) in SelectAddrMode2OffsetImm() local
[all …]
|
| H A D | ARMLoadStoreOptimizer.cpp | 1519 ARM_AM::AddrOpc AddSub = Offset < 0 ? ARM_AM::sub : ARM_AM::add; in MergeBaseUpdateLoadStore() local
1553 int Imm = ARM_AM::getAM2Opc(AddSub, abs(Offset), ARM_AM::no_shift); in MergeBaseUpdateLoadStore()
1583 int Imm = ARM_AM::getAM2Opc(AddSub, abs(Offset), ARM_AM::no_shift); in MergeBaseUpdateLoadStore()
2307 ARM_AM::AddrOpc AddSub = ARM_AM::add; in CanFormLdStDWord() local
2309 AddSub = ARM_AM::sub; in CanFormLdStDWord()
2315 Offset = ARM_AM::getAM3Opc(AddSub, OffImm); in CanFormLdStDWord()
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineSelect.cpp | 2192 BinaryOperator *AddSub; in matchSAddSubSat() local
2195 if (!match(MinMax2, m_SMax(m_BinOp(AddSub), m_APInt(MinValue)))) in matchSAddSubSat()
2199 if (!match(MinMax2, m_SMin(m_BinOp(AddSub), m_APInt(MaxValue)))) in matchSAddSubSat()
2217 if (MinMax2->hasNUsesOrMore(3) || AddSub->hasNUsesOrMore(3)) in matchSAddSubSat()
2224 if(!match(AddSub, m_BinOp(m_SExt(m_Value(A)), m_SExt(m_Value(B))))) in matchSAddSubSat()
2234 if (AddSub->getOpcode() == Instruction::Add) in matchSAddSubSat()
2236 else if (AddSub->getOpcode() == Instruction::Sub) in matchSAddSubSat()
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 2952 ARM_AM::AddrOpc AddSub = Val < 0 ? ARM_AM::sub : ARM_AM::add; in addAddrMode2Operands() local
2958 Val = ARM_AM::getAM2Opc(AddSub, Val, ARM_AM::no_shift); in addAddrMode2Operands()
2977 ARM_AM::AddrOpc AddSub = Val < 0 ? ARM_AM::sub : ARM_AM::add; in addAM2OffsetImmOperands() local
2981 Val = ARM_AM::getAM2Opc(AddSub, Val, ARM_AM::no_shift); in addAM2OffsetImmOperands()
3005 ARM_AM::AddrOpc AddSub = Val < 0 ? ARM_AM::sub : ARM_AM::add; in addAddrMode3Operands() local
3011 Val = ARM_AM::getAM3Opc(AddSub, Val); in addAddrMode3Operands()
3037 ARM_AM::AddrOpc AddSub = Val < 0 ? ARM_AM::sub : ARM_AM::add; in addAM3OffsetOperands() local
3041 Val = ARM_AM::getAM3Opc(AddSub, Val); in addAM3OffsetOperands()
3063 ARM_AM::AddrOpc AddSub = Val < 0 ? ARM_AM::sub : ARM_AM::add; in addAddrMode5Operands() local
3069 Val = ARM_AM::getAM5Opc(AddSub, Val); in addAddrMode5Operands()
[all …]
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | SVEInstrFormats.td | 172 def SVEAddSubImmOperand8 : SVEShiftedImmOperand<8, "AddSub", "isSVEAddSubImm<int8_t>">;
173 def SVEAddSubImmOperand16 : SVEShiftedImmOperand<16, "AddSub", "isSVEAddSubImm<int16_t>">;
174 def SVEAddSubImmOperand32 : SVEShiftedImmOperand<32, "AddSub", "isSVEAddSubImm<int32_t>">;
175 def SVEAddSubImmOperand64 : SVEShiftedImmOperand<64, "AddSub", "isSVEAddSubImm<int64_t>">;
|
| H A D | AArch64InstrInfo.td | 1510 defm ADD : AddSub<0, "add", "sub", add>;
1511 defm SUB : AddSub<1, "sub", "add">;
|
| H A D | AArch64InstrFormats.td | 2478 multiclass AddSub<bit isSub, string mnemonic, string alias,
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 10368 if (SDValue AddSub = lowerToAddSubOrFMAddSub(BV, Subtarget, DAG)) in LowerBUILD_VECTOR() local
10369 return AddSub; in LowerBUILD_VECTOR()
38302 if (SDValue AddSub = combineShuffleToAddSubOrFMAddSub(N, Subtarget, DAG)) in combineShuffle() local
38303 return AddSub; in combineShuffle()
|