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Searched refs:AUX_SW_CONTROL (Results 1 – 4 of 4) sorted by relevance

/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/
H A Ddce_aux.h39 SRI(AUX_SW_CONTROL, DP_AUX, id), \
48 SRI(AUX_SW_CONTROL, DP_AUX, id), \
58 uint32_t AUX_SW_CONTROL; member
99 AUX_SF(AUX_SW_CONTROL, AUX_SW_START_DELAY, mask_sh),\
100 AUX_SF(AUX_SW_CONTROL, AUX_SW_WR_BYTES, mask_sh),\
101 AUX_SF(AUX_SW_CONTROL, AUX_SW_GO, mask_sh),\
124 AUX_SF(AUX_SW_CONTROL, AUX_SW_START_DELAY, mask_sh),\
125 AUX_SF(AUX_SW_CONTROL, AUX_SW_WR_BYTES, mask_sh),\
126 AUX_SF(AUX_SW_CONTROL, AUX_SW_GO, mask_sh),\
H A Damdgpu_dce_aux.c235 REG_UPDATE_2(AUX_SW_CONTROL, in submit_channel_request()
274 REG_UPDATE(AUX_SW_CONTROL, AUX_SW_GO, 1); in submit_channel_request()
/netbsd-src/sys/external/bsd/drm2/dist/drm/radeon/
H A Dradeon_dp_auxch.c118 WREG32(AUX_SW_CONTROL + aux_offset[instance], in radeon_dp_aux_transfer_native()
120 WREG32(AUX_SW_CONTROL + aux_offset[instance], in radeon_dp_aux_transfer_native()
153 WREG32(AUX_SW_CONTROL + aux_offset[instance], in radeon_dp_aux_transfer_native()
H A Dnid.h838 #define AUX_SW_CONTROL 0x6204 macro