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Searched refs:AR_USEC (Results 1 – 10 of 10) sorted by relevance

/netbsd-src/sys/external/isc/atheros_hal/dist/ar5312/
H A Dar5312_misc.c114 OS_REG_RMW_FIELD(ah, AR_USEC, AR_USEC_USEC32, 1); in ar5312SetupClock()
119 OS_REG_RMW_FIELD(ah, AR_USEC, AR_USEC_USEC32, in ar5312SetupClock()
147 OS_REG_RMW_FIELD(ah, AR_USEC, AR_USEC_USEC32, in ar5312RestoreClock()
/netbsd-src/sys/external/isc/atheros_hal/dist/ar5210/
H A Dar5210_xmit.c183 OS_REG_WRITE(ah, AR_USEC, INIT_TRANSMIT_LATENCY_TURBO); in ar5210ResetTxQueue()
200 OS_REG_WRITE(ah, AR_USEC, INIT_TRANSMIT_LATENCY); in ar5210ResetTxQueue()
H A Dar5210reg.h76 #define AR_USEC 0x8020 /* Transmit latency */ macro
/netbsd-src/sys/external/isc/atheros_hal/dist/ar5212/
H A Dar5212_misc.c674 OS_REG_RMW_FIELD(ah, AR_USEC, AR_USEC_USEC32, 1); in ar5212SetupClock()
711 OS_REG_RMW_FIELD(ah, AR_USEC, AR_USEC_USEC32, in ar5212SetupClock()
728 OS_REG_RMW_FIELD(ah, AR_USEC, AR_USEC_USEC32, in ar5212RestoreClock()
H A Dar5212reg.h258 #define AR_USEC 0x801c /* MAC transmit latency register */ macro
H A Dar5212_reset.c2637 refClock = OS_REG_READ(ah, AR_USEC) & AR_USEC_USEC32; in ar5212SetIFSTiming()
2654 OS_REG_WRITE(ah, AR_USEC, (usec | refClock | txLat | rxLat)); in ar5212SetIFSTiming()
/netbsd-src/sys/external/isc/atheros_hal/dist/ar5211/
H A Dar5211reg.h245 #define AR_USEC 0x801c /* transmit latency register */ macro
H A Dar5211_reset.c354 data = OS_REG_READ(ah, AR_USEC); in ar5211Reset()
357 OS_REG_WRITE(ah, AR_USEC, in ar5211Reset()
/netbsd-src/sys/dev/ic/
H A Darn9287.c621 AR_WRITE(sc, AR_USEC, AR_USEC_ASYNC_FIFO_DUR); in ar9287_1_3_setup_async_fifo()
H A Dathnreg.h138 #define AR_USEC 0x801c macro