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Searched refs:ACPILevel (Results 1 – 16 of 16) sorted by relevance

/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/
H A Damdgpu_fiji_smumgr.c1317 table->ACPILevel.Flags &= ~PPSMC_SWSTATE_FLAG_DC; in fiji_populate_smc_acpi_level()
1322 table->ACPILevel.SclkFrequency = in fiji_populate_smc_acpi_level()
1326 table->ACPILevel.SclkFrequency, in fiji_populate_smc_acpi_level()
1327 (uint32_t *)(&table->ACPILevel.MinVoltage), &mvdd); in fiji_populate_smc_acpi_level()
1333 table->ACPILevel.SclkFrequency = in fiji_populate_smc_acpi_level()
1335 table->ACPILevel.MinVoltage = in fiji_populate_smc_acpi_level()
1341 table->ACPILevel.SclkFrequency, &dividers); in fiji_populate_smc_acpi_level()
1346 table->ACPILevel.SclkDid = (uint8_t)dividers.pll_post_divider; in fiji_populate_smc_acpi_level()
1347 table->ACPILevel.DisplayWatermark = PPSMC_DISPLAY_WATERMARK_LOW; in fiji_populate_smc_acpi_level()
1348 table->ACPILevel.DeepSleepDivId = 0; in fiji_populate_smc_acpi_level()
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H A Damdgpu_iceland_smumgr.c1443 table->ACPILevel.Flags &= ~PPSMC_SWSTATE_FLAG_DC; in iceland_populate_smc_acpi_level()
1446 table->ACPILevel.MinVddc = PP_HOST_TO_SMC_UL(data->acpi_vddc * VOLTAGE_SCALE); in iceland_populate_smc_acpi_level()
1448 table->ACPILevel.MinVddc = PP_HOST_TO_SMC_UL(data->min_vddc_in_pptable * VOLTAGE_SCALE); in iceland_populate_smc_acpi_level()
1450 table->ACPILevel.MinVddcPhases = vddc_phase_shed_control ? 0 : 1; in iceland_populate_smc_acpi_level()
1452 table->ACPILevel.SclkFrequency = atomctrl_get_reference_clock(hwmgr); in iceland_populate_smc_acpi_level()
1456 table->ACPILevel.SclkFrequency, &dividers); in iceland_populate_smc_acpi_level()
1462 table->ACPILevel.SclkDid = (uint8_t)dividers.pll_post_divider; in iceland_populate_smc_acpi_level()
1463 table->ACPILevel.DisplayWatermark = PPSMC_DISPLAY_WATERMARK_LOW; in iceland_populate_smc_acpi_level()
1464 table->ACPILevel.DeepSleepDivId = 0; in iceland_populate_smc_acpi_level()
1473 table->ACPILevel.CgSpllFuncCntl = spll_func_cntl; in iceland_populate_smc_acpi_level()
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H A Damdgpu_ci_smumgr.c1395 table->ACPILevel.Flags &= ~PPSMC_SWSTATE_FLAG_DC; in ci_populate_smc_acpi_level()
1398 table->ACPILevel.MinVddc = PP_HOST_TO_SMC_UL(data->acpi_vddc * VOLTAGE_SCALE); in ci_populate_smc_acpi_level()
1400 table->ACPILevel.MinVddc = PP_HOST_TO_SMC_UL(data->min_vddc_in_pptable * VOLTAGE_SCALE); in ci_populate_smc_acpi_level()
1402 table->ACPILevel.MinVddcPhases = data->vddc_phase_shed_control ? 0 : 1; in ci_populate_smc_acpi_level()
1404 table->ACPILevel.SclkFrequency = atomctrl_get_reference_clock(hwmgr); in ci_populate_smc_acpi_level()
1408 table->ACPILevel.SclkFrequency, &dividers); in ci_populate_smc_acpi_level()
1414 table->ACPILevel.SclkDid = (uint8_t)dividers.pll_post_divider; in ci_populate_smc_acpi_level()
1415 table->ACPILevel.DisplayWatermark = PPSMC_DISPLAY_WATERMARK_LOW; in ci_populate_smc_acpi_level()
1416 table->ACPILevel.DeepSleepDivId = 0; in ci_populate_smc_acpi_level()
1425 table->ACPILevel.CgSpllFuncCntl = spll_func_cntl; in ci_populate_smc_acpi_level()
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H A Damdgpu_vegam_smumgr.c1123 table->ACPILevel.Flags &= ~PPSMC_SWSTATE_FLAG_DC; in vegam_populate_smc_acpi_level()
1131 &table->ACPILevel.MinVoltage, &mvdd); in vegam_populate_smc_acpi_level()
1138 &(table->ACPILevel.SclkSetting)); in vegam_populate_smc_acpi_level()
1143 table->ACPILevel.DeepSleepDivId = 0; in vegam_populate_smc_acpi_level()
1144 table->ACPILevel.CcPwrDynRm = 0; in vegam_populate_smc_acpi_level()
1145 table->ACPILevel.CcPwrDynRm1 = 0; in vegam_populate_smc_acpi_level()
1147 CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.Flags); in vegam_populate_smc_acpi_level()
1148 CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.MinVoltage); in vegam_populate_smc_acpi_level()
1149 CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.CcPwrDynRm); in vegam_populate_smc_acpi_level()
1150 CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.CcPwrDynRm1); in vegam_populate_smc_acpi_level()
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H A Damdgpu_tonga_smumgr.c1194 table->ACPILevel.Flags &= ~PPSMC_SWSTATE_FLAG_DC; in tonga_populate_smc_acpi_level()
1196 table->ACPILevel.MinVoltage = in tonga_populate_smc_acpi_level()
1200 table->ACPILevel.SclkFrequency = atomctrl_get_reference_clock(hwmgr); in tonga_populate_smc_acpi_level()
1204 table->ACPILevel.SclkFrequency, &dividers); in tonga_populate_smc_acpi_level()
1211 table->ACPILevel.SclkDid = (uint8_t)dividers.pll_post_divider; in tonga_populate_smc_acpi_level()
1212 table->ACPILevel.DisplayWatermark = PPSMC_DISPLAY_WATERMARK_LOW; in tonga_populate_smc_acpi_level()
1213 table->ACPILevel.DeepSleepDivId = 0; in tonga_populate_smc_acpi_level()
1222 table->ACPILevel.CgSpllFuncCntl = spll_func_cntl; in tonga_populate_smc_acpi_level()
1223 table->ACPILevel.CgSpllFuncCntl2 = spll_func_cntl_2; in tonga_populate_smc_acpi_level()
1224 table->ACPILevel.CgSpllFuncCntl3 = data->clock_registers.vCG_SPLL_FUNC_CNTL_3; in tonga_populate_smc_acpi_level()
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H A Damdgpu_polaris10_smumgr.c1215 table->ACPILevel.Flags &= ~PPSMC_SWSTATE_FLAG_DC; in polaris10_populate_smc_acpi_level()
1223 &table->ACPILevel.MinVoltage, &mvdd); in polaris10_populate_smc_acpi_level()
1229 result = polaris10_calculate_sclk_params(hwmgr, sclk_frequency, &(table->ACPILevel.SclkSetting)); in polaris10_populate_smc_acpi_level()
1232 table->ACPILevel.DeepSleepDivId = 0; in polaris10_populate_smc_acpi_level()
1233 table->ACPILevel.CcPwrDynRm = 0; in polaris10_populate_smc_acpi_level()
1234 table->ACPILevel.CcPwrDynRm1 = 0; in polaris10_populate_smc_acpi_level()
1236 CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.Flags); in polaris10_populate_smc_acpi_level()
1237 CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.MinVoltage); in polaris10_populate_smc_acpi_level()
1238 CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.CcPwrDynRm); in polaris10_populate_smc_acpi_level()
1239 CONVERT_FROM_HOST_TO_SMC_UL(table->ACPILevel.CcPwrDynRm1); in polaris10_populate_smc_acpi_level()
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/netbsd-src/sys/external/bsd/drm2/dist/drm/radeon/
H A Dradeon_ci_dpm.c3007 table->ACPILevel.Flags &= ~PPSMC_SWSTATE_FLAG_DC; in ci_populate_smc_acpi_level()
3010 table->ACPILevel.MinVddc = cpu_to_be32(pi->acpi_vddc * VOLTAGE_SCALE); in ci_populate_smc_acpi_level()
3012 table->ACPILevel.MinVddc = cpu_to_be32(pi->min_vddc_in_pp_table * VOLTAGE_SCALE); in ci_populate_smc_acpi_level()
3014 table->ACPILevel.MinVddcPhases = pi->vddc_phase_shed_control ? 0 : 1; in ci_populate_smc_acpi_level()
3016 table->ACPILevel.SclkFrequency = rdev->clock.spll.reference_freq; in ci_populate_smc_acpi_level()
3020 table->ACPILevel.SclkFrequency, false, &dividers); in ci_populate_smc_acpi_level()
3024 table->ACPILevel.SclkDid = (u8)dividers.post_divider; in ci_populate_smc_acpi_level()
3025 table->ACPILevel.DisplayWatermark = PPSMC_DISPLAY_WATERMARK_LOW; in ci_populate_smc_acpi_level()
3026 table->ACPILevel.DeepSleepDivId = 0; in ci_populate_smc_acpi_level()
3034 table->ACPILevel.CgSpllFuncCntl = spll_func_cntl; in ci_populate_smc_acpi_level()
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H A Dsmu7_fusion.h236 SMU7_Fusion_ACPILevel ACPILevel; member
H A Dsmu7_discrete.h328 SMU7_Discrete_ACPILevel ACPILevel; member
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/powerplay/inc/
H A Dsmu7_fusion.h236 SMU7_Fusion_ACPILevel ACPILevel; member
H A Dsmu7_discrete.h329 SMU7_Discrete_ACPILevel ACPILevel; member
H A Dsmu71_discrete.h276 SMU71_Discrete_ACPILevel ACPILevel; member
H A Dsmu74_discrete.h287 SMU74_Discrete_ACPILevel ACPILevel; member
H A Dsmu72_discrete.h271 SMU72_Discrete_ACPILevel ACPILevel; member
H A Dsmu73_discrete.h255 SMU73_Discrete_ACPILevel ACPILevel; member
H A Dsmu75_discrete.h293 SMU75_Discrete_ACPILevel ACPILevel; member