| /minix3/external/bsd/llvm/dist/llvm/lib/Support/ |
| H A D | ScaledNumber.cpp | 64 if (int Zeros = countLeadingZeros(Dividend64)) { in divide32() local
65 Shift -= Zeros; in divide32()
66 Dividend64 <<= Zeros; in divide32()
86 if (int Zeros = countTrailingZeros(Divisor)) { in divide64() local
87 Shift -= Zeros; in divide64()
88 Divisor >>= Zeros; in divide64()
96 if (int Zeros = countLeadingZeros(Dividend)) { in divide64() local
97 Shift -= Zeros; in divide64()
98 Dividend <<= Zeros; in divide64()
|
| /minix3/external/bsd/llvm/dist/llvm/include/llvm/MC/ |
| H A D | MCObjectWriter.h | 172 const char Zeros[16] = { 0 }; in WriteZeros() local
175 OS << StringRef(Zeros, 16); in WriteZeros()
177 OS << StringRef(Zeros, N % 16); in WriteZeros()
|
| /minix3/external/bsd/llvm/dist/llvm/lib/Target/PowerPC/Disassembler/ |
| H A D | PPCDisassembler.cpp | 314 unsigned Zeros = countTrailingZeros(Imm); in decodeCRBitMOperand() local
315 assert(Zeros < 8 && "Invalid CR bit value"); in decodeCRBitMOperand()
317 Inst.addOperand(MCOperand::CreateReg(CRRegs[7 - Zeros])); in decodeCRBitMOperand()
|
| /minix3/external/bsd/llvm/dist/clang/lib/CodeGen/ |
| H A D | CGObjCGNU.cpp | 175 return llvm::ConstantExpr::getGetElementPtr(ConstStr, Zeros); in MakeConstantString()
190 return llvm::ConstantExpr::getGetElementPtr(ConstStr, Zeros); in ExportUniqueString()
241 CGM.GetAddrOfConstantCString(NameAndAttributes), Zeros); in MakePropertyEncodingString()
281 llvm::Constant *Zeros[2]; member in __anon9c1d04830111::CGObjCGNU
912 Zeros[0] = llvm::ConstantInt::get(LongTy, 0); in CGObjCGNU()
913 Zeros[1] = Zeros[0]; in CGObjCGNU()
2285 llvm::Constant *offsetPointerIndexes[] = {Zeros[0], in GenerateClass()
2317 NULLPtr, 0x12L, ClassName.c_str(), nullptr, Zeros[0], GenerateIvarList( in GenerateClass()
2450 llvm::Constant *Idxs[] = {Zeros[0], in ModuleInitFunction()
2451 llvm::ConstantInt::get(Int32Ty, i), Zeros[0]}; in ModuleInitFunction()
|
| H A D | CodeGenModule.cpp | 2559 llvm::Constant *Zeros[] = { Zero, Zero }; in GetAddrOfConstantCFString() local
2569 V = llvm::ConstantExpr::getGetElementPtr(GV, Zeros); in GetAddrOfConstantCFString()
2622 Fields[2] = llvm::ConstantExpr::getGetElementPtr(GV, Zeros); in GetAddrOfConstantCFString()
2653 llvm::Constant *Zeros[] = { Zero, Zero }; in GetAddrOfConstantString() local
2676 V = llvm::ConstantExpr::getGetElementPtr(GV, Zeros); in GetAddrOfConstantString()
2736 Fields[1] = llvm::ConstantExpr::getGetElementPtr(GV, Zeros); in GetAddrOfConstantString()
|
| /minix3/external/bsd/llvm/dist/llvm/lib/IR/ |
| H A D | ConstantRange.cpp | 690 APInt Zeros(getBitWidth(), getUnsignedMax().countLeadingZeros()); in shl() local
691 if (Zeros.ugt(Other.getUnsignedMax())) in shl()
|
| /minix3/external/bsd/llvm/dist/llvm/include/llvm/IR/ |
| H A D | IRBuilder.h | 1551 Value *Zeros = ConstantAggregateZero::get(VectorType::get(I32Ty, NumElts));
1552 return CreateShuffleVector(V, Undef, Zeros, Name + ".splat");
|
| /minix3/external/bsd/llvm/dist/llvm/lib/Analysis/ |
| H A D | ScalarEvolution.cpp | 3655 APInt Zeros(BitWidth, 0), Ones(BitWidth, 0); in GetMinTrailingZeros() local
3656 computeKnownBits(U->getValue(), Zeros, Ones, DL, 0, AC, nullptr, DT); in GetMinTrailingZeros()
3657 return Zeros.countTrailingOnes(); in GetMinTrailingZeros()
3826 APInt Zeros(BitWidth, 0), Ones(BitWidth, 0); in getUnsignedRange() local
3827 computeKnownBits(U->getValue(), Zeros, Ones, DL, 0, AC, nullptr, DT); in getUnsignedRange()
3828 if (Ones == ~Zeros + 1) in getUnsignedRange()
3831 ConservativeResult.intersectWith(ConstantRange(Ones, ~Zeros + 1))); in getUnsignedRange()
|
| /minix3/external/bsd/llvm/dist/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineAndOrXor.cpp | 1297 uint32_t Zeros = AndRHSMask.countLeadingZeros(); in visitAnd() local
1298 APInt Mask = APInt::getLowBitsSet(BitWidth, BitWidth - Zeros); in visitAnd()
|
| /minix3/external/bsd/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 15174 APInt Zeros, Ones; in LowerToBT() local
15175 DAG.computeKnownBits(Op0, Zeros, Ones); in LowerToBT()
15176 if (Zeros.countLeadingOnes() < BitWidth - AndBitWidth) in LowerToBT()
18471 SDValue Zeros = getZeroVector(VT, Subtarget, DAG, dl); in LowerScalarImmediateShift() local
18472 return DAG.getNode(X86ISD::PCMPGT, dl, VT, Zeros, R); in LowerScalarImmediateShift()
18517 SDValue Zeros = getZeroVector(VT, Subtarget, DAG, dl); in LowerScalarImmediateShift() local
18518 return DAG.getNode(X86ISD::PCMPGT, dl, VT, Zeros, R); in LowerScalarImmediateShift()
21883 SDValue Zeros = getZeroVector(VT, Subtarget, DAG, dl); in PerformShuffleCombine256() local
21884 SDValue InsV = Insert128BitVector(Zeros, V1.getOperand(0), 0, DAG, dl); in PerformShuffleCombine256()
|
| /minix3/external/bsd/llvm/dist/llvm/lib/Target/Mips/ |
| H A D | MipsInstrInfo.td | 971 // Count Leading Ones/Zeros in Word
|
| /minix3/external/bsd/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMInstrNEON.td | 5263 // VCLZ : Vector Count Leading Zeros
|
| /minix3/external/bsd/llvm/dist/llvm/docs/ |
| H A D | LangRef.rst | 1796 No Signed Zeros - Allow optimizations to treat the sign of a zero
|