Home
last modified time | relevance | path

Searched refs:V9 (Results 1 – 25 of 29) sorted by relevance

12

/minix3/external/bsd/llvm/dist/llvm/test/CodeGen/SPARC/
H A D2011-01-11-CC.ll2 ; RUN: llc -march=sparc -mattr=v9 <%s | FileCheck %s -check-prefix=V9
11 ; V9: addcc
12 ; V9-NOT: subcc
13 ; V9: addx
14 ; V9: mov{{e|ne}} %icc
27 ; V9: test_select_int_icc
28 ; V9: cmp
29 ; V9-NOT: {{be|bne}}
30 ; V9: mov{{e|ne}} %icc
42 ; V9: test_select_fp_icc
[all …]
H A D2011-01-11-Call.ll3 ; RUN: llc -march=sparcv9 <%s | FileCheck %s --check-prefix=V9
14 ; V9-LABEL: test
15 ; V9: save %sp
16 ; V9: call foo
17 ; V9-NEXT: nop
18 ; V9: call bar
19 ; V9-NEXT: nop
20 ; V9: ret
21 ; V9-NEXT: restore
42 ; V9-LABEL: test_tail_call_with_return
[all …]
H A D2011-01-11-FrameAddr.ll2 ;RUN: llc -march=sparc -mattr=v9 < %s | FileCheck %s -check-prefix=V9
4 ;RUN: llc -march=sparc -regalloc=basic -mattr=v9 < %s | FileCheck %s -check-prefix=V9
15 ;V9-LABEL: frameaddr:
16 ;V9: save %sp, -96, %sp
17 ;V9: ret
18 ;V9: restore %g0, %fp, %o0
39 ;V9-LABEL: frameaddr2:
40 ;V9: flushw
41 ;V9: ld [%fp+56], {{.+}}
42 ;V9: ld [{{.+}}+56], {{.+}}
[all …]
H A Dfloat.ll3 ; RUN: llc -march=sparc -mattr=v9 < %s | FileCheck %s -check-prefix=V9
16 ; V9-LABEL: test_neg:
17 ; V9: fnegd %f0, %f0
38 ; V9-LABEL: test_abs:
39 ; V9: fabsd %f0, %f0
61 ; V9-LABEL: test_v9_floatreg:
62 ; V9: fsubd {{.+}}, {{.+}}, {{.+}}
63 ; V9: faddd {{.+}}, {{.+}}, [[R:%f((3(2|4|6|8))|((4|5)(0|2|4|6|8))|(60|62))]]
64 ; V9: fmovd [[R]], %f0
85 ; V9-LABEL: test_xtos_stox
[all …]
H A Dctpop.ll2 ; RUN: llc < %s -march=sparc -mattr=+v9,+popc | FileCheck %s -check-prefix=V9
7 ; RUN: llc < %s -march=sparc -mcpu=niagara2 | FileCheck %s -check-prefix=V9
8 ; RUN: llc < %s -march=sparc -mcpu=niagara3 | FileCheck %s -check-prefix=V9
9 ; RUN: llc < %s -march=sparc -mcpu=niagara4 | FileCheck %s -check-prefix=V9
17 ; V9-LABEL: test
18 ; V9: srl %o0, 0, %o0
19 ; V9-NEXT: retl
20 ; V9-NEXT: popc %o0, %o0
H A Dsetjmp.ll2 ;RUN: llc -march=sparcv9 < %s | FileCheck %s --check-prefix=V9
19 ; V9-LABEL: foo
20 ; V9-DAG: st {{.+}}, [%i0]
21 ; V9-DAG: st {{.+}}, [%i0+4]
22 ; V9: call _setjmp
23 ; V9: ldx [%fp+{{.+}}], %[[R:[gilo][0-7]]]
24 ; V9: st %o0, [%[[R]]+{{.+}}]
H A D2009-08-28-PIC.ll2 ; RUN: llc -march=sparcv9 --relocation-model=pic < %s | FileCheck %s --check-prefix=V9
10 ; V9-LABEL: func
11 ; V9: _GLOBAL_OFFSET_TABLE_
/minix3/external/bsd/llvm/dist/llvm/test/MC/Sparc/
H A Dsparcv9-instructions.s2 ! RUN: llvm-mc %s -arch=sparcv9 -show-encoding | FileCheck %s --check-prefix=V9
6 ! V9: addx %g2, %g1, %g3 ! encoding: [0x86,0x40,0x80,0x01]
11 ! V9: addxcc %g1, %g2, %g3 ! encoding: [0x86,0xc0,0x40,0x02]
16 ! V9: subx %g2, %g1, %g3 ! encoding: [0x86,0x60,0x80,0x01]
21 ! V9: subxcc %g1, %g2, %g3 ! encoding: [0x86,0xe0,0x40,0x02]
H A Dsparc-fp-instructions.s67 ! make sure we can handle V9 double registers and their aliased quad registers.
/minix3/external/bsd/llvm/dist/llvm/lib/Target/Sparc/
H A DREADME.txt9 * When in V9 mode, register allocate %icc[0-3].
39 1) should be replaced with a brz in V9 mode.
41 * Same as above, but emit conditional move on register zero (p192) in V9
50 * Emit MULX/[SU]DIVX instructions in V9 mode instead of fiddling
H A DSparc.td25 "Enable SPARC-V9 instructions">;
28 "Enable deprecated V8 instructions in V9 mode">;
H A DSparcInstrInfo.td30 // HasV9 - This predicate is true when the target processor supports V9
35 // HasNoV9 - This predicate is true when the target doesn't have V9
37 // costs for V8 instructions that are more expensive than their V9 ones.
53 // V8, or when it is V9 but the V8 deprecated instructions are efficient enough
936 // V9 Instructions
939 // V9 Conditional Moves.
941 // Move Integer Register on Condition (MOVcc) p. 194 of the V9 manual.
1011 // Floating-Point Move Instructions, p. 164 of the V9 manual.
/minix3/external/bsd/llvm/dist/llvm/lib/Target/PowerPC/
H A DPPCCallingConv.td59 // Vector types returned as "direct" go into V2 .. V9; note that only the
62 CCAssignToReg<[V2, V3, V4, V5, V6, V7, V8, V9]>>,
112 CCAssignToReg<[V2, V3, V4, V5, V6, V7, V8, V9]>>,
163 CCAssignToReg<[V2, V3, V4, V5, V6, V7, V8, V9, V10, V11, V12, V13]>>,
H A DPPCRegisterInfo.td246 (add V2, V3, V4, V5, V0, V1, V6, V7, V8, V9, V10, V11,
H A DPPCFrameLowering.cpp34 PPC::V8 , PPC::V9 , PPC::V10, PPC::V11, PPC::V12, PPC::V13, PPC::V14, PPC::V15,
H A DPPCISelLowering.cpp2646 PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13 in LowerFormalArguments_64SVR4()
2994 PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13 in LowerFormalArguments_Darwin()
4357 PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13 in LowerCall_64SVR4()
4851 PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13 in LowerCall_Darwin()
/minix3/crypto/external/bsd/openssl/dist/crypto/
H A Dsparccpuid.S41 ! Following is V9 "rd %ccr,%o0" instruction. However! V8
45 ! V9-compliant, as V9 returns a distinct value of 0x99,
/minix3/external/bsd/llvm/dist/clang/test/Misc/
H A Ddiag-template-diffing.cpp255 template<typename T> using V9 = U9<U9<T>>; typedef
257 int k9 = f9(V9<double>());
/minix3/external/bsd/llvm/dist/clang/test/Parser/
H A DMicrosoftExtensions.cpp319 …__declspec(property(get=GetV=)) int V9; // expected-error {{expected ',' or ')' at end of property…
/minix3/external/bsd/llvm/dist/llvm/test/Transforms/SLPVectorizer/X86/
H A Dinsert-element-build-vector.ll318 ; CHECK-DAG: %[[V9:.+]] = fmul <2 x double> <double 1.000000e+00, double 1.000000e+00>, %[[V5]]
319 ; CHECK-DAG: %[[V10:.+]] = extractelement <2 x double> %[[V9]], i32 0
321 ; CHECK-DAG: %[[V11:.+]] = extractelement <2 x double> %[[V9]], i32 1
/minix3/external/bsd/llvm/dist/llvm/docs/
H A DCompilerWriterInfo.rst85 * `SPARC V9 ABI <http://sparc.org/standards/64.psabi.1.35.ps.Z>`_
H A DWritingAnLLVMBackend.rst1586 Data64bitsDirective = 0; // .xword is only supported by V9.
1666 architecture: Version 8 (V8, which is a 32-bit architecture), Version 9 (V9, a
1670 V9 has 32 double-precision floating-point registers that are also usable as 16
1672 The UltraSPARC architecture combines V9 with UltraSPARC Visual Instruction Set
1704 "Enable SPARC-V9 instructions">;
1707 "Enable deprecated V8 instructions in V9 mode">;
/minix3/external/bsd/llvm/dist/llvm/lib/Target/PowerPC/Disassembler/
H A DPPCDisassembler.cpp86 PPC::V8, PPC::V9, PPC::V10, PPC::V11,
/minix3/external/bsd/file/dist/magic/magdir/
H A Delf118 >18 leshort 43 SPARC V9,
/minix3/external/bsd/llvm/dist/llvm/lib/Target/PowerPC/AsmParser/
H A DPPCAsmParser.cpp90 PPC::V8, PPC::V9, PPC::V10, PPC::V11,

12