| /minix3/common/dist/zlib/msdos/ |
| H A D | Makefile.dj2 | 41 RM=del 90 $(RM) $(INCLUDE_PATH)\zlib.h 91 $(RM) $(INCLUDE_PATH)\zconf.h 92 $(RM) $(LIBRARY_PATH)\libz.a 95 $(RM) *.d 96 $(RM) *.o 97 $(RM) *.exe 98 $(RM) libz.a 99 $(RM) foo.gz
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| H A D | Makefile.emx | 23 RM=del 60 $(RM) *.d 61 $(RM) *.o 62 $(RM) *.exe 63 $(RM) zlib.a 64 $(RM) foo.gz
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| /minix3/common/dist/zlib/win32/ |
| H A D | Makefile.gcc | 51 RM = rm -f 115 -$(RM) $(INCLUDE_PATH)/zlib.h 116 -$(RM) $(INCLUDE_PATH)/zconf.h 117 -$(RM) $(LIBRARY_PATH)/$(STATICLIB) 118 -$(RM) $(LIBRARY_PATH)/$(IMPLIB) 121 -$(RM) $(STATICLIB) 122 -$(RM) $(SHAREDLIB) 123 -$(RM) $(IMPLIB) 124 -$(RM) *.o 125 -$(RM) *.exe [all …]
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| H A D | Makefile.emx | 23 RM=del 60 $(RM) *.d 61 $(RM) *.o 62 $(RM) *.exe 63 $(RM) zlib.a 64 $(RM) foo.gz
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| /minix3/external/bsd/llvm/dist/llvm/lib/Target/Sparc/ |
| H A D | SparcTargetMachine.cpp | 32 Reloc::Model RM, CodeModel::Model CM, in SparcTargetMachine() argument 35 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), in SparcTargetMachine() 85 Reloc::Model RM, in SparcV8TargetMachine() argument 88 : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) { in SparcV8TargetMachine() 97 Reloc::Model RM, in SparcV9TargetMachine() argument 100 : SparcTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) { in SparcV9TargetMachine()
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| H A D | SparcTargetMachine.h | 29 Reloc::Model RM, CodeModel::Model CM, 50 Reloc::Model RM, CodeModel::Model CM, 62 Reloc::Model RM, CodeModel::Model CM,
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| /minix3/external/bsd/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMTargetMachine.h | 42 Reloc::Model RM, CodeModel::Model CM, 67 const TargetOptions &Options, Reloc::Model RM, 78 Reloc::Model RM, CodeModel::Model CM, 88 const TargetOptions &Options, Reloc::Model RM, 100 const TargetOptions &Options, Reloc::Model RM, 111 Reloc::Model RM, CodeModel::Model CM, 122 Reloc::Model RM, CodeModel::Model CM,
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| H A D | ARMTargetMachine.cpp | 112 Reloc::Model RM, CodeModel::Model CM, in ARMBaseTargetMachine() argument 114 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), in ARMBaseTargetMachine() 178 Reloc::Model RM, CodeModel::Model CM, in ARMTargetMachine() argument 180 : ARMBaseTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, isLittle) { in ARMTargetMachine() 192 Reloc::Model RM, CodeModel::Model CM, in ARMLETargetMachine() argument 194 : ARMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {} in ARMLETargetMachine() 201 Reloc::Model RM, CodeModel::Model CM, in ARMBETargetMachine() argument 203 : ARMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {} in ARMBETargetMachine() 210 Reloc::Model RM, CodeModel::Model CM, in ThumbTargetMachine() argument 212 : ARMBaseTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, in ThumbTargetMachine() [all …]
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| H A D | ARMInstrInfo.cpp | 94 Reloc::Model RM) const { in expandLoadStackGuard() 99 if (RM == Reloc::PIC_) in expandLoadStackGuard() 100 expandLoadStackGuardBase(MI, ARM::LDRLIT_ga_pcrel, ARM::LDRi12, RM); in expandLoadStackGuard() 102 expandLoadStackGuardBase(MI, ARM::LDRLIT_ga_abs, ARM::LDRi12, RM); in expandLoadStackGuard() 106 if (RM != Reloc::PIC_) { in expandLoadStackGuard() 107 expandLoadStackGuardBase(MI, ARM::MOVi32imm, ARM::LDRi12, RM); in expandLoadStackGuard() 114 if (!Subtarget.GVIsIndirectSymbol(GV, RM)) { in expandLoadStackGuard() 115 expandLoadStackGuardBase(MI, ARM::MOV_ga_pcrel, ARM::LDRi12, RM); in expandLoadStackGuard()
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| /minix3/external/bsd/llvm/dist/llvm/bindings/ocaml/ |
| H A D | Makefile.ocaml | 223 -$(Verb) $(RM) -f $@ 228 -$(Verb) $(RM) -f $(LibraryA) 238 -$(Verb) $(RM) -f $(DestA) 256 -$(Verb) $(RM) -f $(SharedLib) 266 -$(Verb) $(RM) -f $(DestSharedLib) 287 $(Verb) $(RM) -f $(OutputLibs) 296 $(Verb) $(RM) -f $(DestLibs) 317 -$(Verb) $(RM) -f $(OutputsCMI) 334 $(RM) -f "$(PROJ_libocamldir)/$$i"; \ 338 $(RM) -f "$(PROJ_libocamldir)/$$i"; \ [all …]
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| /minix3/external/mit/lua/dist/ |
| H A D | Makefile | 34 RM= rm -f macro 68 cd src && cd $(INSTALL_BIN) && $(RM) $(TO_BIN) 69 cd src && cd $(INSTALL_INC) && $(RM) $(TO_INC) 70 cd src && cd $(INSTALL_LIB) && $(RM) $(TO_LIB) 71 cd doc && cd $(INSTALL_MAN) && $(RM) $(TO_MAN)
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| /minix3/external/bsd/llvm/dist/llvm/lib/Target/SystemZ/ |
| H A D | SystemZSubtarget.cpp | 56 static bool bindsLocally(const GlobalValue *GV, Reloc::Model RM) { in bindsLocally() argument 58 if (RM == Reloc::Static) in bindsLocally() 65 Reloc::Model RM, in isPC32DBLSymbol() argument 74 return bindsLocally(GV, RM); in isPC32DBLSymbol()
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| /minix3/external/bsd/llvm/dist/llvm/lib/CodeGen/ |
| H A D | LiveRangeEdit.cpp | 116 bool LiveRangeEdit::canRematerializeAt(Remat &RM, in canRematerializeAt() argument 122 if (!Remattable.count(RM.ParentVNI)) in canRematerializeAt() 127 if (RM.OrigMI) in canRematerializeAt() 128 DefIdx = LIS.getInstructionIndex(RM.OrigMI); in canRematerializeAt() 130 DefIdx = RM.ParentVNI->def; in canRematerializeAt() 131 RM.OrigMI = LIS.getInstructionFromIndex(DefIdx); in canRematerializeAt() 132 assert(RM.OrigMI && "No defining instruction for remattable value"); in canRematerializeAt() 136 if (cheapAsAMove && !TII.isAsCheapAsAMove(RM.OrigMI)) in canRematerializeAt() 140 if (!allUsesAvailableAt(RM.OrigMI, DefIdx, UseIdx)) in canRematerializeAt() 149 const Remat &RM, in rematerializeAt() argument [all …]
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| /minix3/crypto/external/bsd/heimdal/dist/lib/asn1/ |
| H A D | NTMakefile | 131 -$(RM) $(LIBASN1) 171 || ($(RM) $(OBJ)\krb5_asn1.h ; exit /b 1) 177 || ($(RM) $(OBJ)\pkinit_asn1.h ; exit /b 1) 183 || ($(RM) $(OBJ)\pkcs8_asn1.h ; exit /b 1) 189 || ($(RM) $(OBJ)\pkcs9_asn1.h ; exit /b 1) 195 || ($(RM) $(OBJ)\pkcs12_asn1.h ; exit /b 1) 201 || ($(RM) $(OBJ)\digest_asn1.h ; exit /b 1) 207 || ($(RM) $(OBJ)\kx509_asn1.h ; exit /b 1) 221 || ($(RM) $(OBJ)\rfc2459_asn1.h ; exit /b 1) 229 || ($(RM) $(OBJ)\cms_asn1.h ; exit /b 1) [all …]
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| /minix3/external/bsd/llvm/dist/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86MCTargetDesc.cpp | 302 static MCCodeGenInfo *createX86MCCodeGenInfo(StringRef TT, Reloc::Model RM, in createX86MCCodeGenInfo() argument 310 if (RM == Reloc::Default) { in createX86MCCodeGenInfo() 316 RM = Reloc::PIC_; in createX86MCCodeGenInfo() 318 RM = Reloc::DynamicNoPIC; in createX86MCCodeGenInfo() 320 RM = Reloc::PIC_; in createX86MCCodeGenInfo() 322 RM = Reloc::Static; in createX86MCCodeGenInfo() 329 if (RM == Reloc::DynamicNoPIC) { in createX86MCCodeGenInfo() 331 RM = Reloc::PIC_; in createX86MCCodeGenInfo() 333 RM = Reloc::Static; in createX86MCCodeGenInfo() 338 if (RM == Reloc::Static && T.isOSDarwin() && is64Bit) in createX86MCCodeGenInfo() [all …]
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| /minix3/external/bsd/llvm/dist/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXTargetMachine.cpp | 75 Reloc::Model RM, CodeModel::Model CM, in NVPTXTargetMachine() argument 77 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), in NVPTXTargetMachine() 89 const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, in NVPTXTargetMachine32() argument 91 : NVPTXTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {} in NVPTXTargetMachine32() 97 const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, in NVPTXTargetMachine64() argument 99 : NVPTXTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {} in NVPTXTargetMachine64()
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| H A D | NVPTXTargetMachine.h | 36 const TargetOptions &Options, Reloc::Model RM, 68 Reloc::Model RM, CodeModel::Model CM, 77 Reloc::Model RM, CodeModel::Model CM,
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| /minix3/external/bsd/llvm/dist/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64MCTargetDesc.cpp | 80 static MCCodeGenInfo *createAArch64MCCodeGenInfo(StringRef TT, Reloc::Model RM, in createAArch64MCCodeGenInfo() argument 100 RM = Reloc::PIC_; in createAArch64MCCodeGenInfo() 104 else if (RM == Reloc::Default || RM == Reloc::DynamicNoPIC) in createAArch64MCCodeGenInfo() 105 RM = Reloc::Static; in createAArch64MCCodeGenInfo() 108 X->InitMCCodeGenInfo(RM, CM, OL); in createAArch64MCCodeGenInfo()
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| /minix3/external/bsd/llvm/dist/llvm/lib/Target/Mips/ |
| H A D | MipsTargetMachine.cpp | 57 Reloc::Model RM, CodeModel::Model CM, in MipsTargetMachine() argument 59 : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), in MipsTargetMachine() 79 Reloc::Model RM, CodeModel::Model CM, in MipsebTargetMachine() argument 81 : MipsTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, false) {} in MipsebTargetMachine() 88 Reloc::Model RM, CodeModel::Model CM, in MipselTargetMachine() argument 90 : MipsTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, true) {} in MipselTargetMachine()
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| /minix3/external/bsd/llvm/dist/llvm/lib/MC/ |
| H A D | MCCodeGenInfo.cpp | 18 void MCCodeGenInfo::InitMCCodeGenInfo(Reloc::Model RM, CodeModel::Model CM, in InitMCCodeGenInfo() argument 20 RelocationModel = RM; in InitMCCodeGenInfo()
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| /minix3/external/bsd/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCTargetMachine.cpp | 85 Reloc::Model RM, CodeModel::Model CM, in PPCTargetMachine() argument 87 : LLVMTargetMachine(T, TT, CPU, computeFSAdditions(FS, OL, TT), Options, RM, in PPCTargetMachine() 101 Reloc::Model RM, CodeModel::Model CM, in PPC32TargetMachine() argument 103 : PPCTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL) { in PPC32TargetMachine() 111 Reloc::Model RM, CodeModel::Model CM, in PPC64TargetMachine() argument 113 : PPCTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL) { in PPC64TargetMachine()
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| H A D | PPCTargetMachine.h | 35 Reloc::Model RM, CodeModel::Model CM, 60 Reloc::Model RM, CodeModel::Model CM, 71 Reloc::Model RM, CodeModel::Model CM,
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| /minix3/external/bsd/llvm/dist/llvm/docs/ |
| H A D | Makefile | 68 $(Verb) $(RM) -rf $@ $(PROJ_OBJ_DIR)/html.tar 85 $(Verb) $(RM) -rf $(PROJ_OBJ_DIR)/doxygen 90 $(Verb) $(RM) -rf $@ $(PROJ_OBJ_DIR)/doxygen.tar 112 $(Verb) $(RM) -rf $(PROJ_OBJ_DIR)/ocamldoc.tar* 119 $(Verb) $(RM) -rf $(PROJ_OBJ_DIR)/ocamldoc 129 $(Verb) $(RM) -rf $(DESTDIR)$(PROJ_docsdir)
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| /minix3/minix/commands/rotate/ |
| H A D | rotate.sh | 3 RM="rm -f" 25 $RM "$1.$k" 2>/dev/null || exit 1
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| /minix3/external/bsd/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64TargetMachine.h | 33 Reloc::Model RM, CodeModel::Model CM, 64 Reloc::Model RM, CodeModel::Model CM, 75 Reloc::Model RM, CodeModel::Model CM,
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