Home
last modified time | relevance | path

Searched refs:REV (Results 1 – 24 of 24) sorted by relevance

/minix3/external/bsd/llvm/dist/llvm/utils/crosstool/
H A Dcreate-snapshots.sh20 readonly REV="${1:-$(getLatestRevisionFromSVN)}"
25 echo "Running: svn export -r ${REV} ${module}; log in ${log}"
26 svn -q export -r ${REV} ${LLVM_PROJECT_SVN}/${module}/trunk \
30 local tarball="${module}-${REV}.tar.bz2"
/minix3/tests/ipf/expected/
H A Df2928 REV: IN pkts 0 bytes 0 OUT pkts 0 bytes 0
34 REV: IN pkts 0 bytes 0 OUT pkts 0 bytes 0
40 REV: IN pkts 0 bytes 0 OUT pkts 0 bytes 0
46 REV: IN pkts 0 bytes 0 OUT pkts 0 bytes 0
H A Df2512 REV: IN pkts 0 bytes 0 OUT pkts 0 bytes 0
18 REV: IN pkts 0 bytes 0 OUT pkts 1 bytes 264
H A Dni627 REV: IN pkts 1 bytes 52 OUT pkts 1 bytes 52
33 REV: IN pkts 0 bytes 0 OUT pkts 0 bytes 0
39 REV: IN pkts 1 bytes 56 OUT pkts 1 bytes 56
H A Df11169 REV: IN pkts 0 bytes 0 OUT pkts 0 bytes 0
175 REV: IN pkts 1 bytes 28 OUT pkts 0 bytes 0
217 REV: IN pkts 0 bytes 0 OUT pkts 0 bytes 0
223 REV: IN pkts 1 bytes 28 OUT pkts 0 bytes 0
266 REV: IN pkts 1 bytes 40 OUT pkts 0 bytes 0
H A Dni2318 REV: IN pkts 1 bytes 28 OUT pkts 1 bytes 28
/minix3/common/dist/zlib/
H A Dcrc32.c68 # define REV(w) (((w)>>24)+(((w)>>8)&0xff00)+ \ macro
151 crc_table[4][n] = REV(c); in make_crc_table()
155 crc_table[k + 4][n] = REV(c); in make_crc_table()
322 c = REV((u4)crc);
346 return (unsigned long)(REV(c));
/minix3/external/bsd/llvm/dist/llvm/docs/
H A DBigEndianNEON.rst78 …DR + REV`` and similarly ``LDR == LD1 + REV`` (on a big endian system), we can simulate either typ…
97 1. Insert a ``REV`` instruction to reverse the lane order after every ``LDR``.
133 … to avoid alignment faults (the result of the ``LD1`` would then need to be reversed with ``REV``).
145 | Lane ordering | ``LDR + REV`` | ``LD1`` |
147 | AAPCS | ``LDR`` | ``LD1 + REV`` |
149 | Alignment for strict mode | ``LDR`` / ``LD1 + REV`` | ``LD1`` |
161 2. Create code generation patterns for bitconverts that create ``REV`` instructions.
188 …REV`` undoing the ``LD1`` of type ``X`` (converting the in-register representation to the same as …
202 It turns out that these ``REV`` pairs can, in almost all cases, be squashed together into a single …
/minix3/external/bsd/less/dist/
H A DMakefile.aut130 REV=`co -p $$f 2>&1 | sed -e '1d' -e '3,$$d' -e 's/revision //'`; \
131 ${RCS} -N$$REL:$$REV $$f; \
/minix3/minix/drivers/video/tda19988/
H A DREADME.txt35 example code from NXP for a Hitex LPC4350 REV A5 which includes
/minix3/external/bsd/llvm/dist/llvm/test/MC/Disassembler/ARM/
H A Dthumb1.txt342 # REV/REV16/REVSH
H A Dbasic-arm-instructions.txt1201 # REV/REV16/REVSH
H A Dthumb2.txt1444 # REV
/minix3/external/bsd/llvm/dist/llvm/test/MC/ARM/
H A Dbasic-thumb-instructions.s472 @ REV/REV16/REVSH
H A Dbasic-thumb2-instructions.s1858 @ REV
H A Dbasic-arm-instructions.s1842 @ REV/REV16/REVSH
H A Dv8_IT_manual.s563 @ REV, encoding T1
567 @ REV, encoding T2 (32-bit)
/minix3/external/bsd/llvm/dist/llvm/lib/Target/AArch64/
H A DAArch64InstrInfo.td5048 // conversions require one or more REV instructions.
5061 // LD1/ST1 perform the equivalent of a sequence of LDR/STR + REV. This makes
5064 // v1 = REV v2i32 (implicit)
5066 // v3 = REV v4i16 v2 (implicit)
5073 // v1 = REV v2i32 (implicit)
5074 // v2 = REV v2i32
5076 // v4 = REV v4i16
5077 // v5 = REV v4i16 v4 (implicit)
5080 // This means an extra two instructions, but actually in most cases the two REV
5084 // There is also no 128-bit REV instruction. This must be synthesized with an
H A DAArch64SchedCyclone.td147 // CLS,CLZ,RBIT,REV,REV16,REV32
/minix3/external/bsd/llvm/dist/llvm/lib/Target/ARM/
H A DARMScheduleSwift.td1166 // CLZ,RBIT,REV,REV16,REVSH,PKH
H A DARMInstrThumb2.td4543 // Alias for REV/REV16/REVSH without the ".w" optional width specifier.
H A DARMInstrInfo.td4153 def REV : AMiscA1I<0b01101011, 0b0011, (outs GPR:$Rd), (ins GPR:$Rm),
/minix3/external/bsd/llvm/dist/llvm/lib/Target/X86/
H A DX86InstrArithmetic.td1211 // they don't have all the usual imm8 and REV forms, and are encoded into a
/minix3/external/gpl3/binutils/patches/
H A D0000-binutils_nbsd.patch12968 + ((SYS VR REV 5 0 "revision field")