Searched refs:Lo0 (Results 1 – 4 of 4) sorted by relevance
| /minix3/external/bsd/llvm/dist/llvm/lib/Target/R600/ |
| H A D | AMDGPUISelDAGToDAG.cpp | 756 SDNode *Lo0 = CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG, in SelectADD_SUB_I64() local 767 SDValue AddLoArgs[] = { SDValue(Lo0, 0), SDValue(Lo1, 0) }; in SelectADD_SUB_I64()
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| H A D | SIISelLowering.cpp | 1022 SDValue Lo0 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::i32, LHS, Zero); in LowerSELECT() local 1025 SDValue Lo = DAG.getSelect(DL, MVT::i32, Cond, Lo0, Lo1); in LowerSELECT()
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| /minix3/external/bsd/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeVectorTypes.cpp | 1645 SDValue Lo0, Hi0, Lo1, Hi1, LoRes, HiRes; in SplitVecOp_VSETCC() local 1647 GetSplitVector(N->getOperand(0), Lo0, Hi0); in SplitVecOp_VSETCC() 1649 unsigned PartElements = Lo0.getValueType().getVectorNumElements(); in SplitVecOp_VSETCC() 1653 LoRes = DAG.getNode(ISD::SETCC, DL, PartResVT, Lo0, Lo1, N->getOperand(2)); in SplitVecOp_VSETCC()
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| /minix3/external/bsd/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 5832 ConstantSDNode *Lo0 = dyn_cast<ConstantSDNode>(BVN->getOperand(LoElt)); in isExtendedBUILD_VECTOR() local 5836 if (!Lo0 || !Hi0 || !Lo1 || !Hi1) in isExtendedBUILD_VECTOR() 5839 if (Hi0->getSExtValue() == Lo0->getSExtValue() >> 32 && in isExtendedBUILD_VECTOR()
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