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Searched refs:IA (Results 1 – 25 of 78) sorted by relevance

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/minix3/external/bsd/llvm/dist/llvm/test/CodeGen/X86/
H A Dpeep-test-3.ll7 define void @or(float* %A, i32 %IA, i32 %N) nounwind {
11 %2 = xor i32 %IA, 1 ; <i32> [#uses=1]
26 define void @xor(float* %A, i32 %IA, i32 %N) nounwind {
32 %2 = xor i32 %IA, 1 ; <i32> [#uses=1]
45 define void @and(float* %A, i32 %IA, i32 %N, i8* %p) nounwind {
50 %2 = xor i32 %IA, 1 ; <i32> [#uses=1]
71 define void @test(float* %A, i32 %IA, i32 %N, i8* %p) nounwind {
76 %2 = xor i32 %IA, 1 ; <i32> [#uses=1]
/minix3/share/misc/
H A Dzipcodes22032 50001:Ackworth, IA
22033 50002:Adair, IA
22034 50003:Adel, IA
22035 50005:Albion, IA
22036 50006:Alden, IA
22037 50007:Alleman, IA
22038 50008:Allerton, IA
22039 50009:Altoona, IA
22040 50010:Ames, IA
22041 50011:Ames, IA
[all …]
H A Dna.phone.add69 319:Iowa (USA):Dubuque:IA
130 515:Iowa (USA):Des Moines:IA
171 641:Iowa (USA):Creston, Mason City, Osceola:IA
195 712:Iowa (USA):Council Bluffs, Sioux City:IA
H A Dna.phone78 319:Iowa (USA):Dubuque:IA
161 515:Iowa (USA):Des Moines:IA
214 641:Iowa (USA):Creston, Mason City, Osceola:IA
244 712:Iowa (USA):Council Bluffs, Sioux City:IA
/minix3/external/bsd/llvm/dist/llvm/include/llvm/IR/
H A DDebugLoc.h77 void getScopeAndInlinedAt(MDNode *&Scope, MDNode *&IA) const;
78 void getScopeAndInlinedAt(MDNode *&Scope, MDNode *&IA, in getScopeAndInlinedAt() argument
80 return getScopeAndInlinedAt(Scope, IA); in getScopeAndInlinedAt()
/minix3/external/bsd/llvm/dist/clang/test/Sema/
H A Dms_class_layout.cpp100 class IA { class
102 virtual ~IA(){} in ~IA()
106 class ICh : public virtual IA {
/minix3/external/bsd/llvm/dist/llvm/lib/CodeGen/
H A DTargetRegisterInfo.cpp232 for (SuperRegClassIterator IA(RCA, this, true); IA.isValid(); ++IA) { in getCommonSuperRegClass() local
233 unsigned FinalA = composeSubRegIndices(IA.getSubReg(), SubA); in getCommonSuperRegClass()
237 firstCommonClass(IA.getMask(), IB.getMask(), this); in getCommonSuperRegClass()
252 *BestPreA = IA.getSubReg(); in getCommonSuperRegClass()
H A DLexicalScopes.cpp109 MDNode *IA = nullptr; in findInlinedScope() local
110 DL.getScopeAndInlinedAt(Scope, IA, MF->getFunction()->getContext()); in findInlinedScope()
111 auto I = InlinedLexicalScopeMap.find(std::make_pair(Scope, IA)); in findInlinedScope()
119 MDNode *IA = nullptr; in findLexicalScope() local
120 DL.getScopeAndInlinedAt(Scope, IA, MF->getFunction()->getContext()); in findLexicalScope()
130 if (IA) { in findLexicalScope()
131 auto I = InlinedLexicalScopeMap.find(std::make_pair(Scope, IA)); in findLexicalScope()
/minix3/crypto/external/bsd/openssl/dist/doc/crypto/
H A DOPENSSL_ia32cap.pod5 OPENSSL_ia32cap - finding the IA-32 processor capabilities
15 containing IA-32 processor capabilities bit vector as it appears in EDX
17 Intel Application Note #241618). Naturally it's meaningful on IA-32[E]
/minix3/external/bsd/llvm/dist/clang/lib/AST/
H A DMicrosoftCXXABI.cpp128 MSInheritanceAttr *IA = getAttr<MSInheritanceAttr>(); in getMSInheritanceModel() local
129 assert(IA && "Expected MSInheritanceAttr on the CXXRecordDecl!"); in getMSInheritanceModel()
130 return IA->getSemanticSpelling(); in getMSInheritanceModel()
/minix3/external/bsd/llvm/dist/llvm/lib/IR/
H A DDebugLoc.cpp30 void DebugLoc::getScopeAndInlinedAt(MDNode *&Scope, MDNode *&IA) const { in getScopeAndInlinedAt()
32 IA = getInlinedAt(); in getScopeAndInlinedAt()
H A DDebugInfo.cpp523 MDNode *IA = nullptr; in Verify() local
525 while ((IA = DL.getInlinedAt())) in Verify()
526 DL = DebugLoc::getFromDILocation(IA); in Verify()
527 DL.getScopeAndInlinedAt(Scope, IA); in Verify()
530 assert(!IA); in Verify()
/minix3/external/bsd/llvm/dist/llvm/lib/Transforms/Utils/
H A DValueMapper.cpp46 if (const InlineAsm *IA = dyn_cast<InlineAsm>(V)) { in MapValue() local
48 FunctionType *NewTy = IA->getFunctionType(); in MapValue()
52 if (NewTy != IA->getFunctionType()) in MapValue()
53 V = InlineAsm::get(NewTy, IA->getAsmString(), IA->getConstraintString(), in MapValue()
54 IA->hasSideEffects(), IA->isAlignStack()); in MapValue()
/minix3/external/bsd/llvm/dist/clang/test/Layout/
H A Dms-x86-vtordisp.cpp419 struct IA { struct
422 struct __declspec(dllexport) IB : virtual IA {
/minix3/external/bsd/llvm/dist/llvm/lib/Analysis/
H A DTypeBasedAliasAnalysis.cpp594 int IA = PathA.size() - 1; in getMostGenericTBAA() local
598 while (IA >= 0 && IB >=0) { in getMostGenericTBAA()
599 if (PathA[IA] == PathB[IB]) in getMostGenericTBAA()
600 Ret = PathA[IA]; in getMostGenericTBAA()
603 --IA; in getMostGenericTBAA()
/minix3/external/bsd/llvm/dist/llvm/test/Transforms/LoopStrengthReduce/
H A D2011-10-06-ReusePhi.ll25 define float @test(float* nocapture %A, float* nocapture %B, i32 %N, i32 %IA, i32 %IB) nounwind uwt…
31 %idx.ext = sext i32 %IA to i64
/minix3/external/bsd/llvm/dist/clang/test/CXX/special/class.copy/
H A Dp11.0x.copy.cpp68 …IsAmbiguous IA; // expected-note{{copy constructor of 'Deleted' is implicitly deleted because fiel… member
H A Dp11.0x.move.cpp63 IsAmbiguous IA; // expected-note{{deleted because field 'IA' has a deleted move constructor}} member
/minix3/external/bsd/llvm/dist/clang/lib/Tooling/
H A DCompilationDatabase.cpp132 const driver::InputAction *IA = cast<driver::InputAction>(A); in runImpl() local
133 Inputs.push_back(IA->getInputArg().getSpelling()); in runImpl()
/minix3/external/bsd/llvm/dist/clang/include/clang/CodeGen/
H A DCGFunctionInfo.h218 void setIndirectAlign(unsigned IA) { in setIndirectAlign() argument
220 IndirectAlign = IA; in setIndirectAlign()
/minix3/external/bsd/llvm/dist/llvm/lib/Bitcode/Writer/
H A DValueEnumerator.cpp376 MDNode *Scope, *IA; in ValueEnumerator() local
377 I.getDebugLoc().getScopeAndInlinedAt(Scope, IA, I.getContext()); in ValueEnumerator()
379 if (IA) EnumerateMetadata(IA); in ValueEnumerator()
H A DBitcodeWriter.cpp1026 if (const InlineAsm *IA = dyn_cast<InlineAsm>(V)) { in WriteConstants() local
1027 Record.push_back(unsigned(IA->hasSideEffects()) | in WriteConstants()
1028 unsigned(IA->isAlignStack()) << 1 | in WriteConstants()
1029 unsigned(IA->getDialect()&1) << 2); in WriteConstants()
1032 const std::string &AsmStr = IA->getAsmString(); in WriteConstants()
1038 const std::string &ConstraintStr = IA->getConstraintString(); in WriteConstants()
1749 MDNode *Scope, *IA; in WriteFunction() local
1750 DL.getScopeAndInlinedAt(Scope, IA, I->getContext()); in WriteFunction()
1756 Vals.push_back(IA ? VE.getMetadataID(IA) + 1 : 0); in WriteFunction()
/minix3/external/bsd/llvm/dist/llvm/lib/Transforms/ObjCARC/
H A DObjCARCContract.cpp395 InlineAsm *IA = in runOnFunction() local
400 CallInst::Create(IA, "", Inst); in runOnFunction()
/minix3/external/bsd/llvm/dist/llvm/lib/Target/ARM/
H A DARMScheduleSwift.td1503 (instregex "LDM(IA|DA|DB|IB)$", "t2LDM(IA|DA|DB|IB)$",
1504 "(t|sys)LDM(IA|DA|DB|IB)$")>;
1507 "LDM(IA|DA|DB|IB)_UPD", "(t2|sys|t)LDM(IA|DA|DB|IB)_UPD")>;
1556 (instregex "STM(IB|IA|DB|DA)$", "(t2|sys|t)STM(IB|IA|DB|DA)$")>;
1558 (instregex "STM(IB|IA|DB|DA)_UPD", "(t2|sys|t)STM(IB|IA|DB|DA)_UPD",
1837 def : InstRW<[SwiftWriteVLDM], (instregex "VLDM[SD](IA|DB)$")>;
1840 (instregex "VLDM[SD](IA|DB)_UPD$")>;
1873 def : InstRW<[SwiftWriteVSTM], (instregex "VSTM[SD](IA|DB)$")>;
1876 (instregex "VSTM[SD](IA|DB)_UPD")>;
/minix3/external/bsd/llvm/dist/llvm/lib/Target/Mips/
H A DMips16HardFloat.cpp31 llvm::InlineAsm *IA = in inlineAsmOut() local
35 CallInst::Create(IA, AsmArgs, "", BB); in inlineAsmOut()

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