Searched refs:ExtVT (Results 1 – 8 of 8) sorted by relevance
| /minix3/external/bsd/llvm/dist/llvm/lib/Target/R600/ |
| H A D | AMDGPUISelLowering.h | 129 EVT ExtVT) const override;
|
| /minix3/external/bsd/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 2969 EVT ExtVT = EVT::getIntegerVT(*DAG.getContext(), ActiveBits); in visitAND() local 2973 if (ExtVT == LoadedVT && in visitAND() 2975 ExtVT))) { in visitAND() 2979 LN0->getChain(), LN0->getBasePtr(), ExtVT, in visitAND() 2989 if (!LN0->isVolatile() && LoadedVT.bitsGT(ExtVT) && ExtVT.isRound() && in visitAND() 2991 ExtVT))) { in visitAND() 3002 unsigned EVTStoreBytes = ExtVT.getStoreSize(); in visitAND() 3015 ExtVT, LN0->isVolatile(), LN0->isNonTemporal(), in visitAND() 4257 EVT ExtVT = EVT::getIntegerVT(*DAG.getContext(), LowBits); in visitSRA() local 4259 ExtVT = EVT::getVectorVT(*DAG.getContext(), in visitSRA() [all …]
|
| H A D | LegalizeVectorTypes.cpp | 262 EVT ExtVT = cast<VTSDNode>(N->getOperand(1))->getVT().getVectorElementType(); in ScalarizeVecRes_InregOp() local 265 LHS, DAG.getValueType(ExtVT)); in ScalarizeVecRes_InregOp() 2078 EVT ExtVT = EVT::getVectorVT(*DAG.getContext(), in WidenVecRes_InregOp() local 2084 WidenVT, WidenLHS, DAG.getValueType(ExtVT)); in WidenVecRes_InregOp()
|
| H A D | LegalizeIntegerTypes.cpp | 2854 EVT ExtVT = N->getMemoryVT(); in ExpandIntOp_STORE() local 2855 unsigned EBytes = ExtVT.getStoreSize(); in ExpandIntOp_STORE() 2859 ExtVT.getSizeInBits() - ExcessBits); in ExpandIntOp_STORE()
|
| H A D | SelectionDAG.cpp | 6517 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType(); in UnrollVectorOp() local 6520 getValueType(ExtVT))); in UnrollVectorOp()
|
| /minix3/external/bsd/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 6869 MVT ExtVT = VT.getVectorElementType(); in LowerBUILD_VECTOR() local 6901 unsigned EVTBits = ExtVT.getSizeInBits(); in LowerBUILD_VECTOR() 6938 if (ExtVT == MVT::i64 && !Subtarget->is64Bit() && in LowerBUILD_VECTOR() 6981 if (ExtVT == MVT::i32 || ExtVT == MVT::f32 || ExtVT == MVT::f64 || in LowerBUILD_VECTOR() 6982 (ExtVT == MVT::i64 && Subtarget->is64Bit())) { in LowerBUILD_VECTOR() 6994 if (ExtVT == MVT::i16 || ExtVT == MVT::i8) { in LowerBUILD_VECTOR() 7075 EVT HVT = EVT::getVectorVT(*DAG.getContext(), ExtVT, NumElems/2); in LowerBUILD_VECTOR() 7819 MVT ExtVT = MVT::getVectorVT(MVT::getIntegerVT(EltBits * Scale), in lowerVectorShuffleAsSpecificZeroOrAnyExtend() local 7823 DAG.getNode(X86ISD::VZEXT, DL, ExtVT, InputV)); in lowerVectorShuffleAsSpecificZeroOrAnyExtend() 7998 MVT ExtVT = VT; in lowerVectorShuffleAsElementInsertion() local [all …]
|
| /minix3/external/bsd/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 6540 EVT ExtVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); in LowerSIGN_EXTEND_INREG() local 6541 if (ExtVT != MVT::v2i32) { in LowerSIGN_EXTEND_INREG() 6545 ExtVT.getVectorElementType(), 4))); in LowerSIGN_EXTEND_INREG()
|
| /minix3/external/bsd/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 1554 MVT ExtVT = in LowerVectorFP_TO_INT() local 1557 SDValue Ext = DAG.getNode(ISD::FP_EXTEND, dl, ExtVT, Op.getOperand(0)); in LowerVectorFP_TO_INT()
|