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Searched refs:AddSub (Results 1 – 6 of 6) sorted by relevance

/minix3/external/bsd/llvm/dist/llvm/lib/Target/ARM/
H A DARMISelDAGToDAG.cpp576 ARM_AM::AddrOpc AddSub = ARM_AM::add; in SelectLdStSOReg() local
578 AddSub = ARM_AM::sub; in SelectLdStSOReg()
584 Opc = CurDAG->getTargetConstant(ARM_AM::getAM2Opc(AddSub, ShAmt, in SelectLdStSOReg()
607 ARM_AM::AddrOpc AddSub = N.getOpcode() == ISD::SUB ? ARM_AM::sub:ARM_AM::add; in SelectLdStSOReg() local
656 Opc = CurDAG->getTargetConstant(ARM_AM::getAM2Opc(AddSub, ShAmt, ShOpcVal), in SelectLdStSOReg()
675 ARM_AM::AddrOpc AddSub = ARM_AM::add; in SelectAddrMode2Worker() local
677 AddSub = ARM_AM::sub; in SelectAddrMode2Worker()
683 Opc = CurDAG->getTargetConstant(ARM_AM::getAM2Opc(AddSub, ShAmt, in SelectAddrMode2Worker()
722 ARM_AM::AddrOpc AddSub = ARM_AM::add; in SelectAddrMode2Worker() local
724 AddSub = ARM_AM::sub; in SelectAddrMode2Worker()
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H A DARMLoadStoreOptimizer.cpp1256 ARM_AM::AddrOpc AddSub = ARM_AM::add; in MergeBaseUpdateLoadStore() local
1269 AddSub = ARM_AM::sub; in MergeBaseUpdateLoadStore()
1275 NewOpc = getPreIndexedLoadStoreOpcode(Opcode, AddSub); in MergeBaseUpdateLoadStore()
1289 AddSub = ARM_AM::sub; in MergeBaseUpdateLoadStore()
1294 NewOpc = getPostIndexedLoadStoreOpcode(Opcode, AddSub); in MergeBaseUpdateLoadStore()
1322 int Offset = AddSub == ARM_AM::sub ? -Bytes : Bytes; in MergeBaseUpdateLoadStore()
1327 int Offset = ARM_AM::getAM2Opc(AddSub, Bytes, ARM_AM::no_shift); in MergeBaseUpdateLoadStore()
1333 int Offset = AddSub == ARM_AM::sub ? -Bytes : Bytes; in MergeBaseUpdateLoadStore()
1345 int Offset = ARM_AM::getAM2Opc(AddSub, Bytes, ARM_AM::no_shift); in MergeBaseUpdateLoadStore()
1351 int Offset = AddSub == ARM_AM::sub ? -Bytes : Bytes; in MergeBaseUpdateLoadStore()
[all …]
/minix3/external/bsd/llvm/dist/llvm/lib/Target/ARM/AsmParser/
H A DARMAsmParser.cpp2119 ARM_AM::AddrOpc AddSub = Val < 0 ? ARM_AM::sub : ARM_AM::add; in addAddrMode2Operands() local
2123 Val = ARM_AM::getAM2Opc(AddSub, Val, ARM_AM::no_shift); in addAddrMode2Operands()
2140 ARM_AM::AddrOpc AddSub = Val < 0 ? ARM_AM::sub : ARM_AM::add; in addAM2OffsetImmOperands() local
2144 Val = ARM_AM::getAM2Opc(AddSub, Val, ARM_AM::no_shift); in addAM2OffsetImmOperands()
2163 ARM_AM::AddrOpc AddSub = Val < 0 ? ARM_AM::sub : ARM_AM::add; in addAddrMode3Operands() local
2167 Val = ARM_AM::getAM3Opc(AddSub, Val); in addAddrMode3Operands()
2191 ARM_AM::AddrOpc AddSub = Val < 0 ? ARM_AM::sub : ARM_AM::add; in addAM3OffsetOperands() local
2195 Val = ARM_AM::getAM3Opc(AddSub, Val); in addAM3OffsetOperands()
2213 ARM_AM::AddrOpc AddSub = Val < 0 ? ARM_AM::sub : ARM_AM::add; in addAddrMode5Operands() local
2217 Val = ARM_AM::getAM5Opc(AddSub, Val); in addAddrMode5Operands()
/minix3/external/bsd/llvm/dist/llvm/lib/Target/AArch64/
H A DAArch64InstrInfo.td561 defm ADD : AddSub<0, "add", add>;
562 defm SUB : AddSub<1, "sub">;
H A DAArch64InstrFormats.td1636 multiclass AddSub<bit isSub, string mnemonic,
/minix3/external/bsd/llvm/dist/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp22636 if (SDValue AddSub = combineShuffleToAddSub(N, DAG)) in PerformShuffleCombine() local
22637 return AddSub; in PerformShuffleCombine()