| /llvm-project/llvm/test/MC/AMDGPU/ |
| H A D | xdl-insts-gfx908.s | 135 v_dot2c_i32_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 label
138 v_dot2c_i32_i16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 label
141 v_dot2c_i32_i16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 label
144 v_dot2c_i32_i16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 label
147 v_dot2c_i32_i16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 label
150 v_dot2c_i32_i16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 label
153 v_dot2c_i32_i16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 label
156 v_dot2c_i32_i16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 label
159 v_dot2c_i32_i16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 label
162 v_dot2c_i32_i16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 label
[all …]
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| H A D | gfx9_unsupported.s | 664 v_dot2c_i32_i16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 label
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| H A D | gfx8_unsupported.s | 1267 v_dot2c_i32_i16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 label
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| H A D | gfx11_unsupported.s | 1186 v_dot2c_i32_i16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
1183 v_dot2c_i32_i16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 global() label
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| H A D | gfx10_unsupported.s | 1898 v_dot2c_i32_i16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
1895 v_dot2c_i32_i16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 global() label
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| H A D | gfx7_unsupported.s | 1636 v_dot2c_i32_i16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 label
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| /llvm-project/llvm/test/MC/Disassembler/AMDGPU/ |
| H A D | gfx908-xdl-insts.txt | 128 # CHECK: v_dot2c_i32_i16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding: …
131 # CHECK: v_dot2c_i32_i16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding…
134 # CHECK: v_dot2c_i32_i16_dpp v5, v255, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding…
137 # CHECK: v_dot2c_i32_i16_dpp v5, v1, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 ; encoding…
140 # CHECK: v_dot2c_i32_i16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0 ; encoding: …
143 # CHECK: v_dot2c_i32_i16_dpp v5, v1, v2 row_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x0…
146 # CHECK: v_dot2c_i32_i16_dpp v5, v1, v2 row_half_mirror row_mask:0x0 bank_mask:0x0 ; encoding: [0xf…
149 # CHECK: v_dot2c_i32_i16_dpp v5, v1, v2 row_bcast:15 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0…
152 # CHECK: v_dot2c_i32_i16_dpp v5, v1, v2 row_bcast:31 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0…
155 # CHECK: v_dot2c_i32_i16_dpp v5, v1, v2 wave_shl:1 row_mask:0x0 bank_mask:0x0 ; encoding: [0xfa,0x0…
[all …]
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| /llvm-project/llvm/docs/AMDGPU/ |
| H A D | AMDGPUAsmGFX908.rst | 66 …v_dot2c_i32_i16_dpp :ref:`vdst<amdgpu_synid_gfx908_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid_g…
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| H A D | AMDGPUAsmGFX90a.rst | 1004 …v_dot2c_i32_i16_dpp :ref:`vdst<amdgpu_synid_gfx90a_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid…
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| H A D | AMDGPUAsmGFX940.rst | 1000 …v_dot2c_i32_i16_dpp :ref:`vdst<amdgpu_synid_gfx940_vdst_89680f>`, :ref:`vsrc0<amdgpu_synid…
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