| /llvm-project/llvm/test/CodeGen/Mips/ |
| H A D | madd-msub.ll | 16 ; 32-NEXT: mthi $1
37 ; DSP-NEXT: mthi $1, $ac0
88 ; 32-NEXT: mthi $1
107 ; DSP-NEXT: mthi $1, $ac0
149 ; 32-NEXT: mthi $6
168 ; DSP-NEXT: mthi $6, $ac0
265 ; 32-NEXT: mthi $1
286 ; DSP-NEXT: mthi $1, $ac0
337 ; 32-NEXT: mthi $1
357 ; DSP-NEXT: mthi
[all...] |
| H A D | micromips-pseudo-mtlohi-expand.ll | 18 ; MMR2-NEXT: mthi $2 # <MCInst #{{[0-9]+}} MTHI_MM
41 ; MMR2-DSP-NEXT: mthi $2, $ac0 # <MCInst #{{[0-9]+}} MTHI_DSP
|
| H A D | interrupt-attr.ll | 39 ; CHECK: mthi $26
|
| /llvm-project/llvm/test/MC/Mips/dsp/ |
| H A D | valid.s | 65 mthi $16, $ac3 # CHECK: mthi $16, $ac3 # encoding: [0x02,0x00,0x18,0x11]
66 mthi $16 # CHECK: mthi $16 # encoding: [0x02,0x00,0x00,0x11]
|
| /llvm-project/llvm/test/MC/Disassembler/Mips/dsp/ |
| H A D | valid-el.txt | 5 0x11 0x18 0xa0 0x02 # CHECK: mthi $21, $ac3
|
| H A D | valid.txt | 64 0x02 0x00 0x18 0x11 # CHECK: mthi $16, $ac3
65 0x02 0x00 0x00 0x11 # CHECK: mthi $16
|
| /llvm-project/llvm/test/MC/Mips/dspr2/ |
| H A D | valid.s | 87 mthi $16, $ac3 # CHECK: mthi $16, $ac3 # encoding: [0x02,0x00,0x18,0x11]
88 mthi $16 # CHECK: mthi $16 # encoding: [0x02,0x00,0x00,0x11]
|
| /llvm-project/llvm/test/MC/Mips/micromips-dsp/ |
| H A D | valid.s | 94 …mthi $1, $ac1 # CHECK: mthi $1, $ac1 # encoding: [0x00,0x01,0x60,0x7…
|
| /llvm-project/llvm/test/MC/Mips/mips32r6/ |
| H A D | invalid-mips1.s | 18 …mthi $s1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
|
| H A D | invalid-mips2.s | 24 …mthi $s1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
|
| /llvm-project/llvm/test/MC/Mips/mips64r6/ |
| H A D | invalid-mips1.s | 21 …mthi $s1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
|
| H A D | invalid-mips3.s | 17 …mthi $s1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
|
| H A D | invalid-mips2.s | 27 …mthi $s1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
|
| H A D | invalid-mips64.s | 38 …mthi $s1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
|
| /llvm-project/llvm/test/MC/Mips/ |
| H A D | mips-fpu-instructions.s | 154 # CHECK: mthi $7 # encoding: [0x11,0x00,0xe0,0x00]
189 mthi $a3
|
| /llvm-project/libunwind/src/ |
| H A D | UnwindRegistersRestore.S | 1013 mthi $8
1076 mthi $8
|
| /llvm-project/llvm/test/MC/Disassembler/Mips/dspr2/ |
| H A D | valid.txt | 86 0x02 0x00 0x18 0x11 # CHECK: mthi $16, $ac3
87 0x02 0x00 0x00 0x11 # CHECK: mthi $16
|
| /llvm-project/llvm/test/MC/Disassembler/Mips/mips1/ |
| H A D | valid-mips1.txt | 30 0x02 0x20 0x00 0x11 # CHECK: mthi $17
|
| H A D | valid-mips1-el.txt | 65 0x11 0x00 0x20 0x02 # CHECK: mthi $17
|
| /llvm-project/llvm/test/MC/Disassembler/Mips/micromips-dsp/ |
| H A D | valid.txt | 93 0x00 0x01 0x60 0x7c # CHECK: mthi $1, $ac1
|
| /llvm-project/llvm/test/MC/Mips/micromips/ |
| H A D | valid.s | 200 mthi $6 # CHECK: mthi $6 # encoding: [0x00,0x06,0x2d,0x7c] label
|
| /llvm-project/llvm/test/MC/Disassembler/Mips/mips32/ |
| H A D | valid-mips32.txt | 69 0x00 0xe0 0x00 0x11 # CHECK: mthi $7
83 0x02 0x20 0x00 0x11 # CHECK: mthi $17
|
| /llvm-project/llvm/test/MC/Disassembler/Mips/mips2/ |
| H A D | valid-mips2-el.txt | 81 0x11 0x00 0x20 0x02 # CHECK: mthi $17
|
| /llvm-project/llvm/test/MC/Mips/mips1/ |
| H A D | valid.s | 82 mthi $s1
|
| /llvm-project/llvm/test/MC/Disassembler/Mips/mips32r2/ |
| H A D | valid-mips32r2.txt | 75 0x00 0xe0 0x00 0x11 # CHECK: mthi $7
90 0x02 0x20 0x00 0x11 # CHECK: mthi $17
|