/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | SlotIndexes.h | 465 SlotIndex getMBBStartIdx(const MachineBasicBlock *mbb) const { in getMBBEndIdx() 466 return getMBBRange(mbb).first; 475 SlotIndex getMBBEndIdx(const MachineBasicBlock *mbb) const { in getMBBLowerBound() 476 return getMBBRange(mbb).second; in getMBBLowerBound() 606 void insertMBBInMaps(MachineBasicBlock *mbb) { in insertMBBInMaps() 607 assert(mbb != &mbb->getParent()->front() && in insertMBBInMaps() 609 auto prevMBB = std::prev(MachineFunction::iterator(mbb)); in insertMBBInMaps() 611 // Create a new entry to be used for the start of mbb and the end of in insertMBBInMaps() 616 mbb in insertMBBInMaps() 453 getMBBStartIdx(const MachineBasicBlock * mbb) getMBBStartIdx() argument 463 getMBBEndIdx(const MachineBasicBlock * mbb) getMBBEndIdx() argument 594 insertMBBInMaps(MachineBasicBlock * mbb) insertMBBInMaps() argument [all...] |
H A D | LiveIntervals.h | 255 SlotIndex getMBBStartIdx(const MachineBasicBlock *mbb) const { 256 return Indexes->getMBBStartIdx(mbb); in getMBBFromIndex() 260 SlotIndex getMBBEndIdx(const MachineBasicBlock *mbb) const { in insertMBBInMaps() 261 return Indexes->getMBBEndIdx(mbb); in insertMBBInMaps() 264 bool isLiveInToMBB(const LiveRange &LR, const MachineBasicBlock *mbb) const { in insertMBBInMaps() 265 return LR.liveAt(getMBBStartIdx(mbb)); in insertMBBInMaps() 268 bool isLiveOutOfMBB(const LiveRange &LR, const MachineBasicBlock *mbb) const { in InsertMachineInstrInMaps() 269 return LR.liveAt(getMBBEndIdx(mbb).getPrevSlot()); in InsertMachineInstrInMaps() 237 getMBBStartIdx(const MachineBasicBlock * mbb) getMBBStartIdx() argument 242 getMBBEndIdx(const MachineBasicBlock * mbb) getMBBEndIdx() argument 247 isLiveInToMBB(const LiveRange & LR,const MachineBasicBlock * mbb) isLiveInToMBB() argument 252 isLiveOutOfMBB(const LiveRange & LR,const MachineBasicBlock * mbb) isLiveOutOfMBB() argument
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H A D | RegisterPressure.h | 404 const LiveIntervals *lis, const MachineBasicBlock *mbb,
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H A D | SelectionDAGNodes.h | 2094 explicit BasicBlockSDNode(MachineBasicBlock *mbb) 2095 : SDNode(ISD::BasicBlock, 0, DebugLoc(), getSDVTList(MVT::Other)), MBB(mbb)
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/llvm-project/llvm/test/CodeGen/AArch64/ |
H A D | partial-pipeline-execution.ll | 10 ; Check that we can do the same with unreachable-mbb-elimination pass 11 ; RUN: llc -O3 -stop-after=unreachable-mbb-elimination %s -o %t-mbb-elim.mir 12 ; RUN: llc -O3 -start-after=unreachable-mbb-elimination %t-mbb-elim.mir -o %t3.s
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/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMConstantPoolValue.cpp | 264 const MachineBasicBlock *mbb, in ARMConstantPoolMBB() argument 270 MBB(mbb) {} in ARMConstantPoolMBB() 273 const MachineBasicBlock *mbb, in Create() argument 276 return new ARMConstantPoolMBB(C, mbb, ID, PCAdj, ARMCP::no_modifier, false); in Create()
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H A D | ARMConstantPoolValue.h | 248 ARMConstantPoolMBB(LLVMContext &C, const MachineBasicBlock *mbb, unsigned id, 254 const MachineBasicBlock *mbb,
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/llvm-project/clang/test/CodeGenCXX/ |
H A D | mangle-ms-back-references.cpp | 40 void mbb(bool a, bool b) {} in mbb() function 54 b->mbb(false, false); in g4()
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/llvm-project/llvm/test/CodeGen/Hexagon/ |
H A D | unreachable-mbb-phi-subreg.mir | 1 # RUN: llc -mtriple=hexagon -run-pass unreachable-mbb-elimination %s -o - | FileCheck %s
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/llvm-project/llvm/lib/Target/X86/ |
H A D | README-X86-64.txt | 107 JMP mbb<bb2,0x203afb0> 117 %reg1027 = PHI %reg1025, mbb<bb,0x203af10>, 118 %reg1026, mbb<bb1,0x203af60>
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H A D | README-SSE.txt | 164 JE mbb<cond_next204,0xa914d30> 195 JE mbb<cond_next204,0xa914d30>
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/llvm-project/llvm/test/CodeGen/X86/ |
H A D | unreachable-mbb-undef-phi.mir | 1 # RUN: llc -mtriple=x86_64-- %s -o - -run-pass=processimpdefs -run-pass=unreachable-mbb-elimination…
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/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | InstrEmitter.h | 158 InstrEmitter(const TargetMachine &TM, MachineBasicBlock *mbb,
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H A D | InstrEmitter.cpp | 1451 InstrEmitter::InstrEmitter(const TargetMachine &TM, MachineBasicBlock *mbb, in InstrEmitter() 1453 : MF(mbb->getParent()), MRI(&MF->getRegInfo()), in InstrEmitter() 1456 TLI(MF->getSubtarget().getTargetLowering()), MBB(mbb), in InstrEmitter() 1458 EmitDebugInstrRefs = mbb->getParent()->useDebugInstrRef(); in InstrEmitter() 1450 InstrEmitter(const TargetMachine & TM,MachineBasicBlock * mbb,MachineBasicBlock::iterator insertpos) InstrEmitter() argument
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/llvm-project/llvm/test/DebugInfo/MIR/X86/ |
H A D | unreachable-block-call-site.mir | 1 # RUN: llc -emit-call-site-info -mtriple=x86_64-pc-linux -run-pass=unreachable-mbb-elimination -o -…
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/llvm-project/llvm/lib/CodeGen/ |
H A D | README.txt | 41 %reg1039 = PHI %reg1070, mbb<bb76.outer,0x8b0c5f0>, %reg1037, mbb<bb27,0x8b0a7c0>
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H A D | RegisterPressure.cpp | 265 const MachineBasicBlock *mbb, in init() 274 MBB = mbb; in init() 266 init(const MachineFunction * mf,const RegisterClassInfo * rci,const LiveIntervals * lis,const MachineBasicBlock * mbb,MachineBasicBlock::const_iterator pos,bool TrackLaneMasks,bool TrackUntiedDefs) init() argument
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H A D | RegisterCoalescer.cpp | 3982 MBBPriorityInfo(MachineBasicBlock *mbb, unsigned depth, bool issplit) in lateLiveIntervalUpdate() 3983 : MBB(mbb), Depth(depth), IsSplit(issplit) {} in lateLiveIntervalUpdate()
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/llvm-project/llvm/test/Demangle/ |
H A D | ms-back-references.test | 38 ?mbb@S@@QAEX_N0@Z 39 ; CHECK: void __thiscall S::mbb(bool, bool)
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/llvm-project/llvm/test/CodeGen/AMDGPU/ |
H A D | block-should-not-be-in-alive-blocks.mir | 2 …cn-amd-amdhsa -mcpu=gfx1031 -verify-machineinstrs -start-after=unreachable-mbb-elimination -stop-a…
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