| /llvm-project/llvm/test/CodeGen/AMDGPU/ |
| H A D | llvm.amdgcn.image.sample.g16.ll | 9 ; GFX10-NEXT: image_sample_d_g16 v[0:3], v[0:2], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D
15 ; GFX11-NEXT: image_sample_d_g16 v[0:3], v[0:2], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D
21 ; GFX12-NEXT: image_sample_d_g16 v[0:3], [v0, v1, v2], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG…
34 ; GFX10-NEXT: image_sample_d_g16 v[0:3], [v0, v2, v4, v5], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC…
42 ; GFX11-NEXT: image_sample_d_g16 v[0:3], [v0, v2, v4, v5], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC…
50 ; GFX12-NEXT: image_sample_d_g16 v[0:3], [v0, v2, v4, v5], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC…
65 ; GFX10-NEXT: image_sample_d_g16 v[0:3], v[2:8], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_3D
73 ; GFX11-NEXT: image_sample_d_g16 v[0:3], [v0, v2, v3, v5, v[6:8]], s[0:7], s[8:11] dmask:0xf dim…
81 ; GFX12-NEXT: image_sample_d_g16 v[0:3], [v0, v2, v3, v[5:8]], s[0:7], s[8:11] dmask:0xf dim:SQ_…
|
| H A D | llvm.amdgcn.image.sample.g16.encode.ll | 9 ; GFX10-NEXT: image_sample_d_g16 v[0:3], v[0:2], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D ; …
15 ; GFX11-NEXT: image_sample_d_g16 v[0:3], v[0:2], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D ; …
21 ; GFX12-NEXT: image_sample_d_g16 v[0:3], [v0, v1, v2], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG…
34 ; GFX10-NEXT: image_sample_d_g16 v[0:3], [v0, v2, v4, v5], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC…
42 ; GFX11-NEXT: image_sample_d_g16 v[0:3], [v0, v2, v4, v5], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC…
50 ; GFX12-NEXT: image_sample_d_g16 v[0:3], [v0, v2, v4, v5], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC…
65 ; GFX10-NEXT: image_sample_d_g16 v[0:3], v[2:8], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_3D ; …
73 ; GFX11-NEXT: image_sample_d_g16 v[0:3], [v0, v2, v3, v5, v[6:8]], s[0:7], s[8:11] dmask:0xf dim…
81 ; GFX12-NEXT: image_sample_d_g16 v[0:3], [v0, v2, v3, v[5:8]], s[0:7], s[8:11] dmask:0xf dim:SQ_…
|
| H A D | llvm.amdgcn.image.sample.g16.a16.dim.ll | 457 ; GFX10-NEXT: image_sample_d_g16 v[0:3], v[0:2], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D
463 ; GFX10GISEL-NEXT: image_sample_d_g16 v[0:3], v[0:2], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_…
476 ; GFX10-NEXT: image_sample_d_g16 v[0:3], [v0, v2, v4, v5], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC…
486 ; GFX10GISEL-NEXT: image_sample_d_g16 v[0:3], [v0, v1, v4, v5], s[0:7], s[8:11] dmask:0xf dim:SQ…
501 ; GFX10-NEXT: image_sample_d_g16 v[0:3], v[2:8], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_3D
513 ; GFX10GISEL-NEXT: image_sample_d_g16 v[0:3], v[2:8], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_…
896 ; GFX10-NEXT: image_sample_d_g16 v[0:3], v[0:2], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D a16
902 ; GFX10GISEL-NEXT: image_sample_d_g16 v[0:3], v[0:2], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_…
916 ; GFX10-NEXT: image_sample_d_g16 v[0:3], v[2:4], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D a16
928 ; GFX10GISEL-NEXT: image_sample_d_g16 v[0:3], v[0:2], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_…
[all …]
|
| H A D | llvm.amdgcn.image.sample.a16.dim.ll | 923 ; GFX10-NEXT: image_sample_d_g16 v[0:3], v[0:2], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D a16
929 ; GFX11-NEXT: image_sample_d_g16 v[0:3], v[0:2], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D a16
935 ; GFX12-NEXT: image_sample_d_g16 v[0:3], [v0, v1, v2], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D a16
959 ; GFX10-NEXT: image_sample_d_g16 v[0:3], v[2:4], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D a16
968 ; GFX11-NEXT: image_sample_d_g16 v[0:3], v[2:4], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D a16
977 ; GFX12-NEXT: image_sample_d_g16 v[0:3], [v0, v2, v4], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D a16
1007 ; GFX10-NEXT: image_sample_d_g16 v[0:3], v[7:12], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_3D a16
1016 ; GFX11-NEXT: image_sample_d_g16 v[0:3], [v0, v2, v3, v5, v[7:8]], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_3D a16
1027 ; GFX12-NEXT: image_sample_d_g16 v[0:3], [v0, v2, v3, v[8:10]], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_3D a16
|
| /llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/ |
| H A D | llvm.amdgcn.image.sample.g16.ll | 9 ; GFX10-NEXT: image_sample_d_g16 v[0:3], v[0:2], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D
15 ; GFX11-NEXT: image_sample_d_g16 v[0:3], v[0:2], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D
21 ; GFX12-NEXT: image_sample_d_g16 v[0:3], [v0, v1, v2], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG…
36 ; GFX10-NEXT: image_sample_d_g16 v[0:3], [v0, v1, v4, v5], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC…
46 ; GFX11-NEXT: image_sample_d_g16 v[0:3], [v0, v1, v4, v5], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC…
56 ; GFX12-NEXT: image_sample_d_g16 v[0:3], [v0, v1, v4, v5], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC…
73 ; GFX10-NEXT: image_sample_d_g16 v[0:3], v[2:8], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_3D
83 ; GFX11-NEXT: image_sample_d_g16 v[0:3], [v0, v2, v1, v5, v[6:8]], s[0:7], s[8:11] dmask:0xf dim…
93 ; GFX12-NEXT: image_sample_d_g16 v[0:3], [v0, v2, v1, v[5:8]], s[0:7], s[8:11] dmask:0xf dim:SQ_…
|
| /llvm-project/llvm/test/MC/AMDGPU/ |
| H A D | gfx11_asm_mimg.s | 4695 image_sample_d_g16 v[5:6], v[1:3], s[8:15], s[12:15] dmask:0x3 dim:SQ_RSRC_IMG_1D label
4698 image_sample_d_g16 v[5:6], v[253:255], s[8:15], s[12:15] dmask:0x3 dim:SQ_RSRC_IMG_1D label
4701 image_sample_d_g16 v[5:6], v[1:3], s[8:15], s[12:15] dmask:0x3 dim:SQ_RSRC_IMG_1D a16 label
4704 image_sample_d_g16 v[5:6], v[253:255], s[8:15], s[12:15] dmask:0x3 dim:SQ_RSRC_IMG_1D a16 label
4707 image_sample_d_g16 v[5:6], v[1:7], s[8:15], s[12:15] dmask:0x3 dim:SQ_RSRC_IMG_3D label
4710 image_sample_d_g16 v[5:6], v[249:255], s[8:15], s[12:15] dmask:0x3 dim:SQ_RSRC_IMG_3D label
4713 image_sample_d_g16 v[5:6], v[1:6], s[8:15], s[12:15] dmask:0x3 dim:SQ_RSRC_IMG_3D a16 label
4716 image_sample_d_g16 v[5:6], v[250:255], s[8:15], s[12:15] dmask:0x3 dim:SQ_RSRC_IMG_3D a16 label
4719 image_sample_d_g16 v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x3 dim:SQ_RSRC_IMG_2D label
4722 image_sample_d_g16 v[254:255], v[252:255], s[8:15], s[12:15] dmask:0x3 dim:SQ_RSRC_IMG_2D label
[all …]
|
| H A D | gfx12_asm_vsample.s | 675 image_sample_d_g16 v64, [v32, v33, v34], s[4:11], s[4:7] dmask:0x1 dim:SQ_RSRC_IMG_1D label
678 image_sample_d_g16 v64, [v32, v33, v34, v35], s[4:11], s[4:7] dmask:0x8 dim:SQ_RSRC_IMG_2D label
681 image_sample_d_g16 v[64:65], [v32, v33, v34, v[35:38]], s[4:11], s[4:7] dmask:0x3 dim:SQ_RSRC_IMG_3D label
684 image_sample_d_g16 v[64:65], [v32, v33, v34, v[35:36]], s[4:11], s[4:7] dmask:0xc dim:SQ_RSRC_IMG_C… label
687 image_sample_d_g16 v[64:66], [v32, v33, v34, v35], s[4:11], s[4:7] dmask:0xb dim:SQ_RSRC_IMG_1D_ARR… label
690 image_sample_d_g16 v[64:67], [v32, v33, v34, v[35:36]], s[4:11], s[4:7] dmask:0xf dim:SQ_RSRC_IMG_2… label
|
| H A D | gfx10_asm_mimg.s | 595 image_sample_d_g16 v[0:3], v[0:2], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D label
596 ; GFX10: image_sample_d_g16 v[0:3], v[0:2], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D ; encoding…
598 image_sample_d_g16 v[0:3], [v0, v2, v4, v5], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D label
599 ; GFX10: image_sample_d_g16 v[0:3], [v0, v2, v4, v5], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D …
601 image_sample_d_g16 v[0:3], [v0, v2, v3, v5, v6, v7, v8], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_… label
602 ; GFX10: image_sample_d_g16 v[0:3], [v0, v2, v3, v5, v6, v7, v8], s[0:7], s[8:11] dmask:0xf dim:SQ_…
|
| H A D | gfx9_unsupported.s | 49 image_sample_d_g16 v[5:6], v[1:3], s[8:15], s[12:15] dmask:0x3 label
|
| H A D | gfx8_unsupported.s | 49 image_sample_d_g16 v[5:6], v[1:3], s[8:15], s[12:15] dmask:0x3 label
|
| H A D | gfx7_unsupported.s | 2591 image_sample_d_g16 v[5:6], v[1:3], s[8:15], s[12:15] dmask:0x3 label
|
| /llvm-project/llvm/test/MC/Disassembler/AMDGPU/ |
| H A D | gfx11_dasm_mimg.txt | 4695 # GFX11: image_sample_d_g16 v[5:6], v[1:3], s[8:15], s[12:15] dmask:0x3 dim:SQ_RSRC_IMG_1D ; encodi…
4698 # GFX11: image_sample_d_g16 v[5:6], v[253:255], s[8:15], s[12:15] dmask:0x3 dim:SQ_RSRC_IMG_1D ; en…
4701 # GFX11: image_sample_d_g16 v[5:6], v[1:3], s[8:15], s[12:15] dmask:0x3 dim:SQ_RSRC_IMG_1D a16 ; en…
4704 # GFX11: image_sample_d_g16 v[5:6], v[253:255], s[8:15], s[12:15] dmask:0x3 dim:SQ_RSRC_IMG_1D a16 …
4707 # GFX11: image_sample_d_g16 v[5:6], v[1:7], s[8:15], s[12:15] dmask:0x3 dim:SQ_RSRC_IMG_3D ; encodi…
4710 # GFX11: image_sample_d_g16 v[5:6], v[249:255], s[8:15], s[12:15] dmask:0x3 dim:SQ_RSRC_IMG_3D ; en…
4713 # GFX11: image_sample_d_g16 v[5:6], v[1:6], s[8:15], s[12:15] dmask:0x3 dim:SQ_RSRC_IMG_3D a16 ; en…
4716 # GFX11: image_sample_d_g16 v[5:6], v[250:255], s[8:15], s[12:15] dmask:0x3 dim:SQ_RSRC_IMG_3D a16 …
4719 # GFX11: image_sample_d_g16 v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x3 dim:SQ_RSRC_IMG_2D ; encodi…
4722 # GFX11: image_sample_d_g16 v[254:255], v[252:255], s[8:15], s[12:15] dmask:0x3 dim:SQ_RSRC_IMG_2D …
[all …]
|
| H A D | gfx12_dasm_vsample.txt | 681 # GFX12: image_sample_d_g16 v64, [v32, v33, v34], s[4:11], s[4:7] dmask:0x1 dim:SQ_RSRC_IMG_1D ; encoding: [0x00,0x40,0x4e,0xe4,0x40,0x08,0x00,0x02,0x20,0x21,0x22,0x00]
684 # GFX12: image_sample_d_g16 v64, [v32, v33, v34, v35], s[4:11], s[4:7] dmask:0x8 dim:SQ_RSRC_IMG_2D ; encoding: [0x01,0x40,0x0e,0xe6,0x40,0x08,0x00,0x02,0x20,0x21,0x22,0x23]
687 # GFX12: image_sample_d_g16 v[64:65], [v32, v33, v34, v[35:38]], s[4:11], s[4:7] dmask:0x3 dim:SQ_RSRC_IMG_3D ; encoding: [0x02,0x40,0xce,0xe4,0x40,0x08,0x00,0x02,0x20,0x21,0x22,0x23]
690 # GFX12: image_sample_d_g16 v[64:65], [v32, v33, v34, v[35:36]], s[4:11], s[4:7] dmask:0xc dim:SQ_RSRC_IMG_CUBE ; encoding: [0x03,0x40,0x0e,0xe7,0x40,0x08,0x00,0x02,0x20,0x21,0x22,0x23]
693 # GFX12: image_sample_d_g16 v[64:66], [v32, v33, v34, v35], s[4:11], s[4:7] dmask:0xb dim:SQ_RSRC_IMG_1D_ARRAY ; encoding: [0x04,0x40,0xce,0xe6,0x40,0x08,0x00,0x02,0x20,0x21,0x22,0x23]
696 # GFX12: image_sample_d_g16 v[64:67], [v32, v33, v34, v[35:36]], s[4:11], s[4:7] dmask:0xf dim:SQ_RSRC_IMG_2D_ARRAY ; encoding: [0x05,0x40,0xce,0xe7,0x40,0x08,0x00,0x02,0x20,0x21,0x22,0x23]
|
| H A D | gfx10_mimg.txt | 720 # GFX10: image_sample_d_g16 v[0:3], v[0:2], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_1D ; encoding: [0x01,0x0f,0x88,0xf0,0x00,0x00,0x40,0x00]
723 # GFX10: image_sample_d_g16 v[0:3], [v0, v2, v4, v5], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_2D ; encoding: [0x0b,0x0f,0x88,0xf0,0x00,0x00,0x40,0x00,0x02,0x04,0x05,0x00]
726 # GFX10: image_sample_d_g16 v[0:3], [v0, v2, v3, v5, v6, v7, v8], s[0:7], s[8:11] dmask:0xf dim:SQ_RSRC_IMG_3D ; encoding: [0x15,0x0f,0x88,0xf0,0x00,0x00,0x40,0x00,0x02,0x03,0x05,0x06,0x07,0x08,0x00,0x00]
|
| /llvm-project/llvm/docs/AMDGPU/ |
| H A D | AMDGPUAsmGFX1030.rst | 640 …image_sample_d_g16 :ref:`vdst<amdgpu_synid_gfx1030_vdst_eae4c8>`, :ref:`vaddr<amdgpu_syni…
|
| H A D | AMDGPUAsmGFX10.rst | 661 …image_sample_d_g16 :ref:`vdst<amdgpu_synid_gfx10_vdst_eae4c8>`, :ref:`vaddr<amdgpu_synid_…
|
| H A D | AMDGPUAsmGFX11.rst | 553 …image_sample_d_g16 :ref:`vdst<amdgpu_synid_gfx11_vdst_eae4c8>`, :ref:`vaddr<amdgpu_synid_g…
|