Searched refs:hash_e (Results 1 – 4 of 4) sorted by relevance
/llvm-project/clang/test/CodeGen/ |
H A D | arm64_crypto.c | 31 uint32x4_t test_sha1c(uint32x4_t hash_abcd, uint32_t hash_e, uint32x4_t wk) { in test_sha1c() argument 35 return vsha1cq_u32(hash_abcd, hash_e, wk); in test_sha1c() 38 uint32x4_t test_sha1p(uint32x4_t hash_abcd, uint32_t hash_e, uint32x4_t wk) { in test_sha1p() argument 42 return vsha1pq_u32(hash_abcd, hash_e, wk); in test_sha1p() 45 uint32x4_t test_sha1m(uint32x4_t hash_abcd, uint32_t hash_e, uint32x4_t wk) { in test_sha1m() argument 49 return vsha1mq_u32(hash_abcd, hash_e, wk); in test_sha1m() 52 uint32_t test_sha1h(uint32_t hash_e) { in test_sha1h() argument 57 return vsha1h_u32(hash_e); in test_sha1h()
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H A D | neon-crypto.c | 40 uint32_t test_vsha1h_u32(uint32_t hash_e) { in test_vsha1h_u32() argument 42 return vsha1h_u32(hash_e); in test_vsha1h_u32() 58 uint32x4_t test_vsha1cq_u32(uint32x4_t hash_abcd, uint32_t hash_e, uint32x4_t wk) { in test_vsha1cq_u32() argument 60 return vsha1cq_u32(hash_abcd, hash_e, wk); in test_vsha1cq_u32() 64 uint32x4_t test_vsha1pq_u32(uint32x4_t hash_abcd, uint32_t hash_e, uint32x4_t wk) { in test_vsha1pq_u32() argument 66 return vsha1pq_u32(hash_abcd, hash_e, wk); in test_vsha1pq_u32() 70 uint32x4_t test_vsha1mq_u32(uint32x4_t hash_abcd, uint32_t hash_e, uint32x4_t wk) { in test_vsha1mq_u32() argument 72 return vsha1mq_u32(hash_abcd, hash_e, wk); in test_vsha1mq_u32()
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/llvm-project/llvm/test/CodeGen/AArch64/ |
H A D | arm64-crypto.ll | 37 declare <4 x i32> @llvm.aarch64.crypto.sha1c(<4 x i32> %hash_abcd, i32 %hash_e, <4 x i32> %wk) 38 declare <4 x i32> @llvm.aarch64.crypto.sha1p(<4 x i32> %hash_abcd, i32 %hash_e, <4 x i32> %wk) 39 declare <4 x i32> @llvm.aarch64.crypto.sha1m(<4 x i32> %hash_abcd, i32 %hash_e, <4 x i32> %wk) 40 declare i32 @llvm.aarch64.crypto.sha1h(i32 %hash_e) 44 define <4 x i32> @test_sha1c(<4 x i32> %hash_abcd, i32 %hash_e, <4 x i32> %wk) { 48 %res = call <4 x i32> @llvm.aarch64.crypto.sha1c(<4 x i32> %hash_abcd, i32 %hash_e, <4 x i32> %wk) 53 define <4 x i32> @test_sha1c_in_a_row(<4 x i32> %hash_abcd, i32 %hash_e, <4 x i32> %wk) { 59 %res = call <4 x i32> @llvm.aarch64.crypto.sha1c(<4 x i32> %hash_abcd, i32 %hash_e, <4 x i32> %wk) 65 define <4 x i32> @test_sha1p(<4 x i32> %hash_abcd, i32 %hash_e, <4 x i32> %wk) { 69 %res = call <4 x i32> @llvm.aarch64.crypto.sha1p(<4 x i32> %hash_abcd, i32 %hash_e, <4 x i32> %wk) [all …]
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/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMInstrNEON.td | 7374 def : Pat<(v4i32 (int_arm_neon_sha1c v4i32:$hash_abcd, i32:$hash_e, v4i32:$wk)), 7377 (f32 (COPY_TO_REGCLASS i32:$hash_e, SPR)), 7381 def : Pat<(v4i32 (int_arm_neon_sha1m v4i32:$hash_abcd, i32:$hash_e, v4i32:$wk)), 7384 (f32 (COPY_TO_REGCLASS i32:$hash_e, SPR)), 7388 def : Pat<(v4i32 (int_arm_neon_sha1p v4i32:$hash_abcd, i32:$hash_e, v4i32:$wk)), 7391 (f32 (COPY_TO_REGCLASS i32:$hash_e, SPR)),
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