| /llvm-project/llvm/test/TableGen/ |
| H A D | VarLenEncoder.td | 70 // CHECK: getMachineOpValue(MI, MI.getOperand(1), /*Pos=*/0, Scratch, Fixups, STI);
73 // CHECK: getMachineOpValue(MI, MI.getOperand(2), /*Pos=*/16, Scratch, Fixups, STI);
76 // CHECK: getMachineOpValue(MI, MI.getOperand(0), /*Pos=*/32, Scratch, Fixups, STI);
79 // CHECK: getMachineOpValue(MI, MI.getOperand(0), /*Pos=*/36, Scratch, Fixups, STI);
88 // CHECK: getMachineOpValue(MI, MI.getOperand(1), /*Pos=*/0, Scratch, Fixups, STI);
91 // CHECK: getMachineOpValue(MI, MI.getOperand(2), /*Pos=*/16, Scratch, Fixups, STI);
94 // CHECK: getMachineOpValue(MI, MI.getOperand(0), /*Pos=*/48, Scratch, Fixups, STI);
97 // CHECK: getMachineOpValue(MI, MI.getOperand(0), /*Pos=*/52, Scratch, Fixups, STI);
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| H A D | HwModeEncodeAPInt.td | 164 // ENCODER: getMachineOpValue(MI, MI.getOperand(0), op, Fixups, STI);
170 // ENCODER: getMachineOpValue(MI, MI.getOperand(0), op, Fixups, STI);
176 // ENCODER: getMachineOpValue(MI, MI.getOperand(0), op, Fixups, STI);
182 // ENCODER: getMachineOpValue(MI, MI.getOperand(0), op, Fixups, STI);
197 // ENCODER: getMachineOpValue(MI, MI.getOperand(0), op, Fixups, STI);
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| H A D | HwModeEncodeDecode3.td | 228 // ENCODER: op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
234 // ENCODER: op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
240 // ENCODER: op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
247 // ENCODER: op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
263 // ENCODER: op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
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| /llvm-project/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| H A D | PPCMCCodeEmitter.cpp | 48 return getMachineOpValue(MI, MO, Fixups, STI); in getDirectBrEncoding()
156 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getCondBrEncoding()
169 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getAbsDirectBrEncoding()
182 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getAbsCondBrEncoding()
195 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo), Fixups, STI) in getVSRpEvenEncoding()
204 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getImm16Encoding()
219 return getMachineOpValue(MI, MO, Fixups, STI); in getImm34Encoding()
247 return getMachineOpValue(MI, MO, Fixups, STI) & 0xFFFF; in getDispRIEncoding()
261 return ((getMachineOpValue(MI, MO, Fixups, STI) >> 2) & 0x3FFF); in getDispRIXEncoding()
277 return ((getMachineOpValue(M in getDispRIX16Encoding()
483 getMachineOpValue(const MCInst &MI, const MCOperand &MO, getMachineOpValue() function in PPCMCCodeEmitter
[all...] |
| H A D | PPCMCCodeEmitter.h | 105 uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
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| /llvm-project/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsMCCodeEmitter.cpp | 528 unsigned Res = getMachineOpValue(MI, MO, Fixups, STI); in getUImm5Lsl2Encoding()
723 getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in MipsMCCodeEmitter
748 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo), Fixups, STI) in getMemEncoding()
750 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups, STI); in getMemEncoding()
764 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo), in getMemEncodingMMImm4()
766 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), in getMemEncodingMMImm4()
778 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo), in getMemEncodingMMImm4Lsl1()
780 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), in getMemEncodingMMImm4Lsl1()
792 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo), in getMemEncodingMMImm4Lsl2()
794 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), in getMemEncodingMMImm4Lsl2()
[all …]
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| H A D | MipsMCCodeEmitter.h | 177 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
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| /llvm-project/llvm/lib/Target/VE/MCTargetDesc/ |
| H A D | VEMCCodeEmitter.cpp | 60 /// getMachineOpValue - Return binary encoding of operand. If the machine
62 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
89 unsigned VEMCCodeEmitter::getMachineOpValue(const MCInst &MI,
121 return getMachineOpValue(MI, MO, Fixups, STI); in getBranchTargetOpValue()
134 static_cast<VECC::CondCode>(getMachineOpValue(MI, MO, Fixups, STI))); in getCCOpValue()
144 getMachineOpValue(MI, MO, Fixups, STI))); in getRDOpValue()
90 unsigned VEMCCodeEmitter::getMachineOpValue(const MCInst &MI, getMachineOpValue() function in VEMCCodeEmitter
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| /llvm-project/llvm/lib/Target/Sparc/MCTargetDesc/ |
| H A D | SparcMCCodeEmitter.cpp | 63 /// getMachineOpValue - Return binary encoding of operand. If the machine
65 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
110 uint64_t op = getMachineOpValue(MI, MO, Fixups, STI); in encodeInstruction()
119 getMachineOpValue(const MCInst &MI, const MCOperand &MO, in encodeInstruction()
208 return getMachineOpValue(MI, MO, Fixups, STI); in getBranchTargetOpValue()
221 return getMachineOpValue(MI, MO, Fixups, STI); in getBranchPredTargetOpValue()
234 return getMachineOpValue(MI, MO, Fixups, STI); in getBranchOnRegTargetOpValue()
122 getMachineOpValue(const MCInst &MI, const MCOperand &MO, getMachineOpValue() function in SparcMCCodeEmitter
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| /llvm-project/llvm/lib/Target/Lanai/MCTargetDesc/ |
| H A D | LanaiMCCodeEmitter.cpp | 54 // getMachineOpValue - Return binary encoding of operand. If the machine
56 unsigned getMachineOpValue(const MCInst &Inst, const MCOperand &MCOp,
106 // getMachineOpValue - Return binary encoding of operand. If the machine in FixupKind()
108 unsigned LanaiMCCodeEmitter::getMachineOpValue(
210 getMachineOpValue(Inst, Op2, Fixups, SubtargetInfo); in getRiMemoryOpValue()
281 getMachineOpValue(Inst, Op2, Fixups, SubtargetInfo); in getSplsOpValue()
291 return getMachineOpValue(Inst, MCOp, Fixups, SubtargetInfo); in getBranchTargetOpValue()
110 unsigned LanaiMCCodeEmitter::getMachineOpValue( getMachineOpValue() function in llvm::LanaiMCCodeEmitter
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| /llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| H A D | R600MCCodeEmitter.cpp | 46 uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
151 uint64_t R600MCCodeEmitter::getMachineOpValue(const MCInst &MI,
156 uint64_t R600MCCodeEmitter::getMachineOpValue(const MCInst &MI, getMachineOpValue() function in R600MCCodeEmitter
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| H A D | AMDGPUMCCodeEmitter.cpp | 47 void getMachineOpValue(const MCInst &MI, const MCOperand &MO, APInt &Op,
406 getMachineOpValue(MI, MI.getOperand(vaddr0 + 1 + i), Encoding, Fixups, in encodeInstruction()
467 getMachineOpValue(MI, MO, Op, Fixups, STI); in getSOPPBrEncoding()
569 void AMDGPUMCCodeEmitter::getMachineOpValue(const MCInst &MI, in needsPCRel()
584 void AMDGPUMCCodeEmitter::getMachineOpValue(const MCInst &MI, getMachineOpValue() function in AMDGPUMCCodeEmitter
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| /llvm-project/llvm/lib/Target/MSP430/MCTargetDesc/ |
| H A D | MSP430MCCodeEmitter.cpp | 51 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
101 unsigned MSP430MCCodeEmitter::getMachineOpValue(const MCInst &MI, in encodeInstruction()
103 unsigned MSP430MCCodeEmitter::getMachineOpValue(const MCInst &MI, getMachineOpValue() function in llvm::MSP430MCCodeEmitter
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| /llvm-project/llvm/lib/Target/BPF/MCTargetDesc/ |
| H A D | BPFMCCodeEmitter.cpp | 51 // getMachineOpValue - Return binary encoding of operand. If the machin
53 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
78 unsigned BPFMCCodeEmitter::getMachineOpValue(const MCInst &MI,
79 unsigned BPFMCCodeEmitter::getMachineOpValue(const MCInst &MI, getMachineOpValue() function in BPFMCCodeEmitter
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| /llvm-project/llvm/lib/Target/M68k/MCTargetDesc/ |
| H A D | M68kMCCodeEmitter.cpp | 47 void getMachineOpValue(const MCInst &MI, const MCOperand &Op,
199 void M68kMCCodeEmitter::getMachineOpValue(const MCInst &MI, const MCOperand &Op, in getMachineOpValue() function in M68kMCCodeEmitter
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| /llvm-project/llvm/lib/Target/Xtensa/MCTargetDesc/ |
| H A D | XtensaMCCodeEmitter.cpp | 58 uint32_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
154 XtensaMCCodeEmitter::getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue()
291 uint32_t RegBits = getMachineOpValue(MI, MI.getOperand(OpNo), Fixups, STI); in getImm8_sh8OpValue()
146 XtensaMCCodeEmitter::getMachineOpValue(const MCInst &MI, const MCOperand &MO, getMachineOpValue() function in XtensaMCCodeEmitter
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| /llvm-project/llvm/lib/Target/SystemZ/MCTargetDesc/ |
| H A D | SystemZMCCodeEmitter.cpp | 59 uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
148 getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in SystemZMCCodeEmitter
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| /llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| H A D | HexagonMCCodeEmitter.h | 68 unsigned getMachineOpValue(MCInst const &MI, MCOperand const &MO,
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| /llvm-project/llvm/lib/Target/AVR/MCTargetDesc/ |
| H A D | AVRMCCodeEmitter.h | 89 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
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| H A D | AVRMCCodeEmitter.cpp | 249 unsigned AVRMCCodeEmitter::getMachineOpValue(const MCInst &MI, in getExprOpValue()
255 unsigned AVRMCCodeEmitter::getMachineOpValue(const MCInst &MI, getMachineOpValue() function in llvm::AVRMCCodeEmitter
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| /llvm-project/llvm/lib/Target/LoongArch/MCTargetDesc/ |
| H A D | LoongArchMCCodeEmitter.cpp | 63 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
100 LoongArchMCCodeEmitter::getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue()
97 LoongArchMCCodeEmitter::getMachineOpValue(const MCInst &MI, const MCOperand &MO, getMachineOpValue() function in LoongArchMCCodeEmitter
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| /llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/ |
| H A D | RISCVMCCodeEmitter.cpp | 79 uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
374 RISCVMCCodeEmitter::getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getImmOpValueAsr1()
359 RISCVMCCodeEmitter::getMachineOpValue(const MCInst &MI, const MCOperand &MO, getMachineOpValue() function in RISCVMCCodeEmitter
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| /llvm-project/llvm/lib/Target/CSKY/MCTargetDesc/ |
| H A D | CSKYMCCodeEmitter.h | 45 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
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| H A D | CSKYMCCodeEmitter.cpp | 235 CSKYMCCodeEmitter::getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue() function in CSKYMCCodeEmitter
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| /llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64MCCodeEmitter.cpp | 56 /// getMachineOpValue - Return binary encoding of operand. If the machine
58 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
226 /// getMachineOpValue - Return binary encoding of operand. If the machine in getMachineOpValue()
229 AArch64MCCodeEmitter::getMachineOpValue(const MCInst &MI, const MCOperand &MO, in getMachineOpValue()
223 AArch64MCCodeEmitter::getMachineOpValue(const MCInst &MI, const MCOperand &MO, getMachineOpValue() function in AArch64MCCodeEmitter
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