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Searched refs:fixed_vector (Results 1 – 25 of 38) sorted by relevance

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/llvm-project/libc/test/src/__support/
H A Dfixedvector_test.cpp14 LIBC_NAMESPACE::FixedVector<int, 20> fixed_vector; in TEST() local
15 ASSERT_TRUE(fixed_vector.empty()); in TEST()
17 ASSERT_TRUE(fixed_vector.push_back(i)); in TEST()
18 ASSERT_FALSE(fixed_vector.empty()); in TEST()
19 ASSERT_FALSE(fixed_vector.push_back(123)); in TEST()
21 ASSERT_EQ(fixed_vector.back(), i - 1); in TEST()
22 ASSERT_TRUE(fixed_vector.pop_back()); in TEST()
24 ASSERT_FALSE(fixed_vector.pop_back()); in TEST()
25 ASSERT_TRUE(fixed_vector.empty()); in TEST()
29 LIBC_NAMESPACE::FixedVector<int, 20> fixed_vector; in TEST() local
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/llvm-project/llvm/unittests/CodeGen/
H A DLowLevelTypeTest.cpp132 EXPECT_EQ(LLT::fixed_vector(2, 32), in TEST()
140 EXPECT_EQ(LLT::fixed_vector(2, 32), in TEST()
147 LLT::fixed_vector(2, LLT::pointer(1, 32)), in TEST()
158 const LLT V2S32 = LLT::fixed_vector(2, 32); in TEST()
159 const LLT V2S64 = LLT::fixed_vector(2, 64); in TEST()
161 const LLT V2P0 = LLT::fixed_vector(2, P0); in TEST()
162 const LLT V2P1 = LLT::fixed_vector(2, P1); in TEST()
201 const LLT V2P0 = LLT::fixed_vector(2, P0); in TEST()
202 const LLT V3P0 = LLT::fixed_vector(3, P0); in TEST()
205 const LLT V2S64 = LLT::fixed_vector( in TEST()
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/llvm-project/llvm/unittests/CodeGen/GlobalISel/
H A DGISelUtilsTest.cpp24 static const LLT V2S8 = LLT::fixed_vector(2, 8);
25 static const LLT V4S8 = LLT::fixed_vector(4, 8);
26 static const LLT V8S8 = LLT::fixed_vector(8, 8);
28 static const LLT V2S16 = LLT::fixed_vector(2, 16);
29 static const LLT V3S16 = LLT::fixed_vector(3, 16);
30 static const LLT V4S16 = LLT::fixed_vector(4, 16);
32 static const LLT V2S32 = LLT::fixed_vector(2, 32);
33 static const LLT V3S32 = LLT::fixed_vector(3, 32);
34 static const LLT V4S32 = LLT::fixed_vector(4, 32);
35 static const LLT V6S32 = LLT::fixed_vector(
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H A DLegalizerInfoTest.cpp98 LegacyInfo.setAction({G_ADD, LLT::fixed_vector(8, 8)}, in TEST()
100 LegacyInfo.setAction({G_ADD, LLT::fixed_vector(16, 8)}, in TEST()
102 LegacyInfo.setAction({G_ADD, LLT::fixed_vector(4, 16)}, in TEST()
104 LegacyInfo.setAction({G_ADD, LLT::fixed_vector(8, 16)}, in TEST()
106 LegacyInfo.setAction({G_ADD, LLT::fixed_vector(2, 32)}, in TEST()
108 LegacyInfo.setAction({G_ADD, LLT::fixed_vector(4, 32)}, in TEST()
121 EXPECT_EQ(L.getAction({G_ADD, {LLT::fixed_vector(8, 8)}}), in TEST()
123 EXPECT_EQ(L.getAction({G_ADD, {LLT::fixed_vector(8, 7)}}), in TEST()
124 LegalizeActionStep(WidenScalar, 0, LLT::fixed_vector(8, 8))); in TEST()
125 EXPECT_EQ(L.getAction({G_ADD, {LLT::fixed_vector(2, 8)}}), in TEST()
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H A DCSETest.cpp63 auto Splat0 = CSEB.buildConstant(LLT::fixed_vector(2, s32), 0); in TEST_F()
68 auto FSplat = CSEB.buildFConstant(LLT::fixed_vector(2, s32), 1.0); in TEST_F()
214 CSEB.buildBuildVector(LLT::fixed_vector(4, 32), {Reg1, Reg2, Reg1, Reg2}); in TEST_F()
216 CSEB.buildBuildVector(LLT::fixed_vector(4, 32), {Reg1, Reg2, Reg1, Reg2}); in TEST_F()
222 auto BuildVecTrunc1 = CSEB.buildBuildVectorTrunc(LLT::fixed_vector(4, 16), in TEST_F()
224 auto BuildVecTrunc2 = CSEB.buildBuildVectorTrunc(LLT::fixed_vector(4, 16), in TEST_F()
347 LLT VecTy = LLT::fixed_vector(4, s32); in TEST_F()
389 LLT VecTy = LLT::fixed_vector(4, s32); in TEST_F()
503 LLT VecTy = LLT::fixed_vector(2, s32);
504 LLT DstTy = LLT::fixed_vector(
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H A DMachineIRBuilderTest.cpp20 B.buildConstant(LLT::fixed_vector(2, 32), 99); in TEST_F()
21 B.buildFConstant(LLT::fixed_vector(2, 32), 2.0); in TEST_F()
54 EXPECT_DEATH(B.buildConstant(LLT::fixed_vector(2, 16), APV32), in TEST_F()
61 EXPECT_DEATH(B.buildConstant(LLT::fixed_vector(2, 16), *CI), in TEST_F()
68 EXPECT_DEATH(B.buildFConstant(LLT::fixed_vector(2, 16), *CF), in TEST_F()
340 LLT V2x32 = LLT::fixed_vector(2, 32); in TEST_F()
344 B.buildMergeLikeInstr(LLT::fixed_vector(4, 32), {RegC0C1, RegC2C3}); in TEST_F()
379 LLT V2x32 = LLT::fixed_vector(2, 32); in TEST_F()
489 LLT VecTy = LLT::fixed_vector(4, 32);
490 LLT SubVecTy = LLT::fixed_vector(
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H A DLegalizerHelperTest.cpp148 LLT V4S32 = LLT::fixed_vector(4, S32); in TEST_F()
1384 const LLT V2S32 = LLT::fixed_vector(2, 32); in TEST_F()
1385 const LLT V5S32 = LLT::fixed_vector(5, 32); in TEST_F()
1431 LLT v2s32 = LLT::fixed_vector(2, 32); in TEST_F()
1432 LLT v6s32 = LLT::fixed_vector(6, 32); in TEST_F()
1483 LLT v2s32 = LLT::fixed_vector(2, 32); in TEST_F()
1484 LLT v5s32 = LLT::fixed_vector(5, 32); in TEST_F()
1626 LLT v2s32 = LLT::fixed_vector(2, 32); in TEST_F()
1630 .lowerFor({s64, LLT::fixed_vector(2, s32)}); in TEST_F()
1714 LLT V2S16 = LLT::fixed_vector(2, S16); in TEST_F()
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H A DLegalizerTest.cpp36 auto v2s8 = LLT::fixed_vector(2, 8);
37 auto v2s16 = LLT::fixed_vector(2, 16);
H A DPatternMatchTest.cpp60 LLT v2s64 = LLT::fixed_vector(2, s64); in TEST_F()
61 LLT v4s64 = LLT::fixed_vector(4, s64); in TEST_F()
540 LLT v2s32 = LLT::fixed_vector(2, 32); in TEST_F()
656 LLT v4s64 = LLT::fixed_vector(4, s64); in TEST_F()
686 LLT v4s64 = LLT::fixed_vector(4, s64); in TEST_F()
758 LLT v2s64 = LLT::fixed_vector(2, 64); in TEST_F()
759 LLT v4s64 = LLT::fixed_vector(4, 64); in TEST_F()
/llvm-project/llvm/lib/Target/SPIRV/
H A DSPIRVLegalizerInfo.cpp83 const LLT v16s64 = LLT::fixed_vector(16, 64); in SPIRVLegalizerInfo()
84 const LLT v16s32 = LLT::fixed_vector(16, 32); in SPIRVLegalizerInfo()
85 const LLT v16s16 = LLT::fixed_vector(16, 16); in SPIRVLegalizerInfo()
86 const LLT v16s8 = LLT::fixed_vector(16, 8); in SPIRVLegalizerInfo()
87 const LLT v16s1 = LLT::fixed_vector(16, 1); in SPIRVLegalizerInfo()
89 const LLT v8s64 = LLT::fixed_vector(8, 64); in SPIRVLegalizerInfo()
90 const LLT v8s32 = LLT::fixed_vector(8, 32); in SPIRVLegalizerInfo()
91 const LLT v8s16 = LLT::fixed_vector(8, 16); in SPIRVLegalizerInfo()
92 const LLT v8s8 = LLT::fixed_vector(8, 8); in SPIRVLegalizerInfo()
93 const LLT v8s1 = LLT::fixed_vector( in SPIRVLegalizerInfo()
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H A DSPIRVPreLegalizer.cpp
/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64InstructionSelector.cpp1914 if (Ty == LLT::fixed_vector(2, 64)) { in selectVectorSHL()
1916 } else if (Ty == LLT::fixed_vector(4, 32)) { in selectVectorSHL()
1918 } else if (Ty == LLT::fixed_vector(2, 32)) { in selectVectorSHL()
1920 } else if (Ty == LLT::fixed_vector(4, 16)) { in selectVectorSHL()
1922 } else if (Ty == LLT::fixed_vector(8, 16)) { in selectVectorSHL()
1924 } else if (Ty == LLT::fixed_vector(16, 8)) { in selectVectorSHL()
1926 } else if (Ty == LLT::fixed_vector(8, 8)) { in selectVectorSHL()
1968 if (Ty == LLT::fixed_vector(2, 64)) { in selectVectorAshrLshr()
1971 } else if (Ty == LLT::fixed_vector(4, 32)) { in selectVectorAshrLshr()
1974 } else if (Ty == LLT::fixed_vector( in selectVectorAshrLshr()
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H A DAArch64PreLegalizerCombiner.cpp319 MidTy = LLT::fixed_vector(4, 32); in applyExtAddvToUdotAddv()
322 MidTy = LLT::fixed_vector(2, 32); in applyExtAddvToUdotAddv()
342 LLT MainTy = LLT::fixed_vector(16, 8); in applyExtAddvToUdotAddv()
354 Register v8Zeroes = Builder.buildConstant(LLT::fixed_vector(8, 8), 0) in applyExtAddvToUdotAddv()
360 .buildMergeLikeInstr(LLT::fixed_vector(16, 8), in applyExtAddvToUdotAddv()
365 .buildMergeLikeInstr(LLT::fixed_vector(16, 8), in applyExtAddvToUdotAddv()
372 extractParts(Ext1SrcReg, LLT::fixed_vector(16, 8), SrcNumElts / 16, in applyExtAddvToUdotAddv()
374 extractParts(Ext2SrcReg, LLT::fixed_vector(16, 8), SrcNumElts / 16, in applyExtAddvToUdotAddv()
385 ZeroesLLT = LLT::fixed_vector(4, 32); in applyExtAddvToUdotAddv()
388 ZeroesLLT = LLT::fixed_vector( in applyExtAddvToUdotAddv()
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H A DAArch64LegalizerInfo.cpp50 const LLT v16s8 = LLT::fixed_vector(16, 8); in AArch64LegalizerInfo()
51 const LLT v8s8 = LLT::fixed_vector(8, 8); in AArch64LegalizerInfo()
52 const LLT v4s8 = LLT::fixed_vector(4, 8); in AArch64LegalizerInfo()
53 const LLT v2s8 = LLT::fixed_vector(2, 8); in AArch64LegalizerInfo()
54 const LLT v8s16 = LLT::fixed_vector(8, 16); in AArch64LegalizerInfo()
55 const LLT v4s16 = LLT::fixed_vector(4, 16); in AArch64LegalizerInfo()
56 const LLT v2s16 = LLT::fixed_vector(2, 16); in AArch64LegalizerInfo()
57 const LLT v2s32 = LLT::fixed_vector(2, 32); in AArch64LegalizerInfo()
58 const LLT v4s32 = LLT::fixed_vector(4, 32); in AArch64LegalizerInfo()
59 const LLT v2s64 = LLT::fixed_vector( in AArch64LegalizerInfo()
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H A DAArch64PostLegalizerCombiner.cpp391 if (DstTy != LLT::fixed_vector(2, 64) && DstTy != LLT::fixed_vector(2, 32) && in matchCombineMulCMLT()
392 DstTy != LLT::fixed_vector(4, 32) && DstTy != LLT::fixed_vector(4, 16) && in matchCombineMulCMLT()
393 DstTy != LLT::fixed_vector(8, 16)) in matchCombineMulCMLT()
/llvm-project/llvm/lib/Target/X86/GISel/
H A DX86LegalizerInfo.cpp56 const LLT v2s32 = LLT::fixed_vector(2, 32); in X86LegalizerInfo()
57 const LLT v4s8 = LLT::fixed_vector(4, 8); in X86LegalizerInfo()
60 const LLT v16s8 = LLT::fixed_vector(16, 8); in X86LegalizerInfo()
61 const LLT v8s16 = LLT::fixed_vector(8, 16); in X86LegalizerInfo()
62 const LLT v4s32 = LLT::fixed_vector(4, 32); in X86LegalizerInfo()
63 const LLT v2s64 = LLT::fixed_vector(2, 64); in X86LegalizerInfo()
64 const LLT v2p0 = LLT::fixed_vector(2, p0); in X86LegalizerInfo()
66 const LLT v32s8 = LLT::fixed_vector(32, 8); in X86LegalizerInfo()
67 const LLT v16s16 = LLT::fixed_vector(16, 16); in X86LegalizerInfo()
68 const LLT v8s32 = LLT::fixed_vector( in X86LegalizerInfo()
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/llvm-project/llvm/lib/Target/PowerPC/GISel/
H A DPPCLegalizerInfo.cpp47 const LLT V16S8 = LLT::fixed_vector(16, 8); in PPCLegalizerInfo()
48 const LLT V8S16 = LLT::fixed_vector(8, 16); in PPCLegalizerInfo()
49 const LLT V4S32 = LLT::fixed_vector(4, 32); in PPCLegalizerInfo()
50 const LLT V2S64 = LLT::fixed_vector(2, 64); in PPCLegalizerInfo()
/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPULegalizerInfo.cpp106 LLT::fixed_vector(Ty.getNumElements() + 1, EltTy)); in oneMoreElement()
136 return std::pair(TypeIdx, LLT::fixed_vector(NewNumElts, EltTy)); in moreEltsToNext32Bit()
158 LLT::fixed_vector(NewNumElts, Ty.getElementType())); in moreElementsToNextExistingRegClass()
171 return LLT::fixed_vector(4, LLT::scalar(32)); in getBufferRsrcRegisterType()
173 return LLT::fixed_vector(NumElems * 4, LLT::scalar(32)); in getBufferRsrcRegisterType()
299 static const LLT V2S8 = LLT::fixed_vector(2, 8);
300 static const LLT V2S16 = LLT::fixed_vector(2, 16);
301 static const LLT V4S16 = LLT::fixed_vector(4, 16);
302 static const LLT V6S16 = LLT::fixed_vector(6, 16);
303 static const LLT V8S16 = LLT::fixed_vector(
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H A DAMDGPUArgumentUsageInfo.cpp95 &AMDGPU::SGPR_128RegClass, LLT::fixed_vector(4, 32)); in getPreloadedValue()
H A DAMDGPUPreLegalizerCombiner.cpp188 const LLT V2S16 = LLT::fixed_vector(2, 16); in applyClampI64ToI16()
/llvm-project/llvm/include/llvm/CodeGenTypes/
H A DLowLevelType.h100 static constexpr LLT fixed_vector(unsigned NumElements, in fixed_vector() function
107 static constexpr LLT fixed_vector(unsigned NumElements, LLT ScalarTy) { in fixed_vector() function
257 return fixed_vector(Factor, *this); in multiplyElements()
/llvm-project/llvm/lib/Target/Mips/
H A DMipsLegalizerInfo.cpp76 const LLT v16s8 = LLT::fixed_vector(16, 8); in MipsLegalizerInfo()
77 const LLT v8s16 = LLT::fixed_vector(8, 16); in MipsLegalizerInfo()
78 const LLT v4s32 = LLT::fixed_vector(4, 32); in MipsLegalizerInfo()
79 const LLT v2s64 = LLT::fixed_vector(2, 64); in MipsLegalizerInfo()
/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DLegacyLegalizerInfo.cpp348 IntermediateType = LLT::fixed_vector(Aspect.Type.getNumElements(), in findVectorLegalAction()
362 LLT::fixed_vector(NumElementsAndAction.first, in findVectorLegalAction()
H A DLegalizeMutations.cpp104 TypeIdx, LLT::fixed_vector(NewNumElements, VecTy.getElementType())); in moreElementsToNextPow2()
/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DLegalizerInfo.h1035 LLT NewTy = LLT::fixed_vector(NumElts, LLT::scalar(MinSize)); in maxScalarIf()
1217 TypeIdx, LLT::fixed_vector(MinElements, VecTy.getElementType())); in clampMaxNumElementsStrict()
1236 TypeIdx, LLT::fixed_vector(NewSize, VecTy.getElementType()));

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