| /llvm-project/llvm/test/MC/AMDGPU/ |
| H A D | gfx1030_err.s | 57 ds_sub_src2_u32 v1 offset:65535 label
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| H A D | gfx90a_err.s | 9 ds_sub_src2_u32 v1 label
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| H A D | gfx7_asm_ds.s | 2451 ds_sub_src2_u32 v1 offset:65535 label
2454 ds_sub_src2_u32 v255 offset:65535 label
2457 ds_sub_src2_u32 v1 label
2460 ds_sub_src2_u32 v1 offset:0 label
2463 ds_sub_src2_u32 v1 offset:4 label
2466 ds_sub_src2_u32 v1 offset:65535 gds label
|
| H A D | gfx9_asm_ds.s | 2589 ds_sub_src2_u32 v1 offset:65535 label
2592 ds_sub_src2_u32 v255 offset:65535 label
2595 ds_sub_src2_u32 v1 label
2598 ds_sub_src2_u32 v1 offset:0 label
2601 ds_sub_src2_u32 v1 offset:4 label
2604 ds_sub_src2_u32 v1 offset:65535 gds label
|
| H A D | gfx8_asm_ds.s | 2403 ds_sub_src2_u32 v1 offset:65535 label
2406 ds_sub_src2_u32 v255 offset:65535 label
2409 ds_sub_src2_u32 v1 label
2412 ds_sub_src2_u32 v1 offset:0 label
2415 ds_sub_src2_u32 v1 offset:4 label
2418 ds_sub_src2_u32 v1 offset:65535 gds label
|
| H A D | gfx10_asm_ds.s | 6041 ds_sub_src2_u32 v1 offset:65535 label
6044 ds_sub_src2_u32 v255 offset:65535 label
6047 ds_sub_src2_u32 v1 label
6050 ds_sub_src2_u32 v1 offset:0 label
6053 ds_sub_src2_u32 v1 offset:4 label
6056 ds_sub_src2_u32 v1 offset:65535 gds label
|
| H A D | gfx11_unsupported.s | 139 ds_sub_src2_u32 v1
136 ds_sub_src2_u32 v1 global() label
|
| /llvm-project/llvm/test/MC/Disassembler/AMDGPU/ |
| H A D | gfx8_ds.txt | 2067 # CHECK: ds_sub_src2_u32 v1 offset:65535 ; encoding: [0xff,0xff,0x02,0xd9,0x01,0x00,0x00,0x…
2070 # CHECK: ds_sub_src2_u32 v255 offset:65535 ; encoding: [0xff,0xff,0x02,0xd9,0xff,0x00,0x00,0x…
2073 # CHECK: ds_sub_src2_u32 v1 ; encoding: [0x00,0x00,0x02,0xd9,0x01,0x00,0x00,0x…
2076 # CHECK: ds_sub_src2_u32 v1 offset:4 ; encoding: [0x04,0x00,0x02,0xd9,0x01,0x00,0x00,0x…
2079 # CHECK: ds_sub_src2_u32 v1 offset:65535 gds ; encoding: [0xff,0xff,0x03,0xd9,0x01,0x00,0x00,0x…
|
| H A D | gfx9_ds.txt | 2235 # CHECK: ds_sub_src2_u32 v1 offset:65535 ; encoding: [0xff,0xff,0x02,0xd9,0x01,0x00,0x00,0x00]
2238 # CHECK: ds_sub_src2_u32 v255 offset:65535 ; encoding: [0xff,0xff,0x02,0xd9,0xff,0x00,0x00,0x00]
2241 # CHECK: ds_sub_src2_u32 v1 ; encoding: [0x00,0x00,0x02,0xd9,0x01,0x00,0x00,0x00]
2244 # CHECK: ds_sub_src2_u32 v1 offset:4 ; encoding: [0x04,0x00,0x02,0xd9,0x01,0x00,0x00,0x00]
2247 # CHECK: ds_sub_src2_u32 v1 offset:65535 gds ; encoding: [0xff,0xff,0x03,0xd9,0x01,0x00,0x00,0x00]
|
| H A D | gfx10_ds.txt | 4091 # GFX10: ds_sub_src2_u32 v1 ; encoding: [0x00,0x00,0x04,0xda,0x01,0x00,0x00,0x00]
4094 # GFX10: ds_sub_src2_u32 v1 offset:4 ; encoding: [0x04,0x00,0x04,0xda,0x01,0x00,0x00,0x00]
4097 # GFX10: ds_sub_src2_u32 v1 offset:65535 ; encoding: [0xff,0xff,0x04,0xda,0x01,0x00,0x00,0x00]
4100 # GFX10: ds_sub_src2_u32 v1 offset:65535 gds ; encoding: [0xff,0xff,0x06,0xda,0x01,0x00,0x00,0x00]
4103 # GFX10: ds_sub_src2_u32 v255 offset:65535 ; encoding: [0xff,0xff,0x04,0xda,0xff,0x00,0x00,0x00]
|
| /llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | DSInstructions.td | 590 def DS_SUB_SRC2_U32 : DS_1A<"ds_sub_src2_u32">;
|
| /llvm-project/llvm/docs/AMDGPU/ |
| H A D | AMDGPUAsmGFX7.rst | 148 …ds_sub_src2_u32 :ref:`vaddr<amdgpu_synid_gfx7_vaddr_f20ee4>` …
|
| H A D | AMDGPUAsmGFX8.rst | 155 …ds_sub_src2_u32 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>` …
|
| H A D | AMDGPUAsmGFX9.rst | 162 …ds_sub_src2_u32 :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>` …
|
| H A D | AMDGPUAsmGFX10.rst | 376 …ds_sub_src2_u32 :ref:`vaddr<amdgpu_synid_gfx10_vaddr_f20ee4>` …
|