| /llvm-project/llvm/test/MC/AMDGPU/ |
| H A D | gfx1030_err.s | 108 ds_dec_src2_u64 v1 offset:65535 label
|
| H A D | gfx90a_err.s | 60 ds_dec_src2_u64 v1 label
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| H A D | gfx7_asm_ds.s | 2775 ds_dec_src2_u64 v1 offset:65535 label
2778 ds_dec_src2_u64 v255 offset:65535 label
2781 ds_dec_src2_u64 v1 label
2784 ds_dec_src2_u64 v1 offset:0 label
2787 ds_dec_src2_u64 v1 offset:4 label
2790 ds_dec_src2_u64 v1 offset:65535 gds label
|
| H A D | gfx9_asm_ds.s | 3084 ds_dec_src2_u64 v1 offset:65535 label
3087 ds_dec_src2_u64 v255 offset:65535 label
3090 ds_dec_src2_u64 v1 label
3093 ds_dec_src2_u64 v1 offset:0 label
3096 ds_dec_src2_u64 v1 offset:4 label
3099 ds_dec_src2_u64 v1 offset:65535 gds label
|
| H A D | gfx8_asm_ds.s | 2880 ds_dec_src2_u64 v1 offset:65535 label
2883 ds_dec_src2_u64 v255 offset:65535 label
2886 ds_dec_src2_u64 v1 label
2889 ds_dec_src2_u64 v1 offset:0 label
2892 ds_dec_src2_u64 v1 offset:4 label
2895 ds_dec_src2_u64 v1 offset:65535 gds label
|
| H A D | gfx10_asm_ds.s | 6707 ds_dec_src2_u64 v1 offset:65535 label
6710 ds_dec_src2_u64 v255 offset:65535 label
6713 ds_dec_src2_u64 v1 label
6716 ds_dec_src2_u64 v1 offset:0 label
6719 ds_dec_src2_u64 v1 offset:4 label
6722 ds_dec_src2_u64 v1 offset:65535 gds label
|
| H A D | gfx11_unsupported.s | 70 ds_dec_src2_u64 v1
67 ds_dec_src2_u64 v1 global() label
|
| /llvm-project/llvm/test/MC/Disassembler/AMDGPU/ |
| H A D | gfx8_ds.txt | 2445 # CHECK: ds_dec_src2_u64 v1 offset:65535 ; encoding: [0xff,0xff,0x88,0xd9,0x01,0x00,0x00,0x…
2448 # CHECK: ds_dec_src2_u64 v255 offset:65535 ; encoding: [0xff,0xff,0x88,0xd9,0xff,0x00,0x00,0x…
2451 # CHECK: ds_dec_src2_u64 v1 ; encoding: [0x00,0x00,0x88,0xd9,0x01,0x00,0x00,0x…
2454 # CHECK: ds_dec_src2_u64 v1 offset:4 ; encoding: [0x04,0x00,0x88,0xd9,0x01,0x00,0x00,0x…
2457 # CHECK: ds_dec_src2_u64 v1 offset:65535 gds ; encoding: [0xff,0xff,0x89,0xd9,0x01,0x00,0x00,0x…
|
| H A D | gfx9_ds.txt | 2613 # CHECK: ds_dec_src2_u64 v1 offset:65535 ; encoding: [0xff,0xff,0x88,0xd9,0x01,0x00,0x00,0x00]
2616 # CHECK: ds_dec_src2_u64 v255 offset:65535 ; encoding: [0xff,0xff,0x88,0xd9,0xff,0x00,0x00,0x00]
2619 # CHECK: ds_dec_src2_u64 v1 ; encoding: [0x00,0x00,0x88,0xd9,0x01,0x00,0x00,0x00]
2622 # CHECK: ds_dec_src2_u64 v1 offset:4 ; encoding: [0x04,0x00,0x88,0xd9,0x01,0x00,0x00,0x00]
2625 # CHECK: ds_dec_src2_u64 v1 offset:65535 gds ; encoding: [0xff,0xff,0x89,0xd9,0x01,0x00,0x00,0x00]
|
| H A D | gfx10_ds.txt | 1184 # GFX10: ds_dec_src2_u64 v1 ; encoding: [0x00,0x00,0x10,0xdb,0x01,0x00,0x00,0x00]
1187 # GFX10: ds_dec_src2_u64 v1 offset:4 ; encoding: [0x04,0x00,0x10,0xdb,0x01,0x00,0x00,0x00]
1190 # GFX10: ds_dec_src2_u64 v1 offset:65535 ; encoding: [0xff,0xff,0x10,0xdb,0x01,0x00,0x00,0x00]
1193 # GFX10: ds_dec_src2_u64 v1 offset:65535 gds ; encoding: [0xff,0xff,0x12,0xdb,0x01,0x00,0x00,0x00]
1196 # GFX10: ds_dec_src2_u64 v255 offset:65535 ; encoding: [0xff,0xff,0x10,0xdb,0xff,0x00,0x00,0x00]
|
| /llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | DSInstructions.td | 608 def DS_DEC_SRC2_U64 : DS_1A<"ds_dec_src2_u64">;
|
| /llvm-project/llvm/docs/AMDGPU/ |
| H A D | AMDGPUAsmGFX7.rst | 67 …ds_dec_src2_u64 :ref:`vaddr<amdgpu_synid_gfx7_vaddr_f20ee4>` …
|
| H A D | AMDGPUAsmGFX8.rst | 71 …ds_dec_src2_u64 :ref:`vaddr<amdgpu_synid_gfx8_vaddr_f20ee4>` …
|
| H A D | AMDGPUAsmGFX9.rst | 71 …ds_dec_src2_u64 :ref:`vaddr<amdgpu_synid_gfx9_vaddr_f20ee4>` …
|
| H A D | AMDGPUAsmGFX10.rst | 285 …ds_dec_src2_u64 :ref:`vaddr<amdgpu_synid_gfx10_vaddr_f20ee4>` …
|