Searched refs:read_cpu_ctrl (Results 1 – 5 of 5) sorted by relevance
215 irq_cause = read_cpu_ctrl(BRIDGE_IRQ_CAUSE); in mv_wdt_enable_armv5()219 irq_mask = read_cpu_ctrl(BRIDGE_IRQ_MASK); in mv_wdt_enable_armv5()223 val = read_cpu_ctrl(RSTOUTn_MASK); in mv_wdt_enable_armv5()237 irq_cause = read_cpu_ctrl(BRIDGE_IRQ_CAUSE); in mv_wdt_enable_armada_38x_xp_helper()255 irq_cause = read_cpu_ctrl(BRIDGE_IRQ_CAUSE); in mv_wdt_enable_armada_38x()270 irq_cause = read_cpu_ctrl(BRIDGE_IRQ_CAUSE_ARMADAXP); in mv_wdt_enable_armada_xp()290 val = read_cpu_ctrl(RSTOUTn_MASK); in mv_wdt_disable_armv5()294 irq_mask = read_cpu_ctrl(BRIDGE_IRQ_MASK); in mv_wdt_disable_armv5()298 irq_cause = read_cpu_ctrl(BRIDGE_IRQ_CAUSE); in mv_wdt_disable_armv5()
238 irq_cause = read_cpu_ctrl(sc->config->bridge_irq_cause); in mv_timer_attach()242 irq_mask = read_cpu_ctrl(BRIDGE_IRQ_MASK); in mv_timer_attach()273 irq_cause = read_cpu_ctrl(timer_softc->config->bridge_irq_cause); in mv_hardclock()388 irq_cause = read_cpu_ctrl(timer_softc->config->bridge_irq_cause); in mv_watchdog_enable_armv5()392 irq_mask = read_cpu_ctrl(BRIDGE_IRQ_MASK); in mv_watchdog_enable_armv5()396 val = read_cpu_ctrl(RSTOUTn_MASK); in mv_watchdog_enable_armv5()410 irq_cause = read_cpu_ctrl(timer_softc->config->bridge_irq_cause); in mv_watchdog_enable_armadaxp()436 val = read_cpu_ctrl(RSTOUTn_MASK); in mv_watchdog_disable_armv5()440 irq_mask = read_cpu_ctrl(BRIDGE_IRQ_MASK); in mv_watchdog_disable_armv5()444 irq_cause = read_cpu_ctrl(timer_softc->config->bridge_irq_cause); in mv_watchdog_disable_armv5()[all …]
242 read_cpu_ctrl_t read_cpu_ctrl; member499 cpu_pm_ctrl = read_cpu_ctrl(CPU_PM_CTRL); in mv_fdt_pm()531 read_cpu_ctrl(uint32_t reg) in read_cpu_ctrl() function534 if (soc_decode_win_spec->read_cpu_ctrl != NULL) in read_cpu_ctrl()535 return (soc_decode_win_spec->read_cpu_ctrl(reg)); in read_cpu_ctrl()641 mask &= read_cpu_ctrl(CPU_PM_CTRL); in soc_power_ctrl_get()786 mode = read_cpu_ctrl(CPU_CONFIG); in soc_identify()794 mode = read_cpu_ctrl(CPU_L2_CONFIG) & CPU_L2_CONFIG_MODE; in soc_identify()799 mode = read_cpu_ctrl(CPU_CONTROL); in soc_identify()
107 uint32_t read_cpu_ctrl(uint32_t);
589 (read_cpu_ctrl(CPU_CONTROL) & CPU_CONTROL_PCIE_DISABLE(unit))) { in mv_pcib_enable() 590 write_cpu_ctrl(CPU_CONTROL, read_cpu_ctrl(CPU_CONTROL) & in mv_pcib_enable()