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Searched refs:getOperandConstraint (Results 1 – 25 of 26) sorted by relevance

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/freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/
H A DX86BaseInfo.h975 if (NumOps > 1 && Desc.getOperandConstraint(1, MCOI::TIED_TO) == 0) in getOperandBias()
979 if (NumOps == 8 && Desc.getOperandConstraint(6, MCOI::TIED_TO) == 0) in getOperandBias()
984 if (NumOps >= 4 && Desc.getOperandConstraint(2, MCOI::TIED_TO) == 0 && in getOperandBias()
985 Desc.getOperandConstraint(3, MCOI::TIED_TO) == 1) in getOperandBias()
989 if (NumOps == 9 && Desc.getOperandConstraint(2, MCOI::TIED_TO) == 0 && in getOperandBias()
990 (Desc.getOperandConstraint(3, MCOI::TIED_TO) == 1 || in getOperandBias()
991 Desc.getOperandConstraint(8, MCOI::TIED_TO) == 1)) in getOperandBias()
H A DX86InstComments.cpp261 if (Desc.getOperandConstraint(MaskOp, MCOI::TIED_TO) != -1) in printMasking()
/freebsd-src/contrib/llvm-project/llvm/include/llvm/MC/
H A DMCInstrDesc.h219 int getOperandConstraint(unsigned OpNum, in getOperandConstraint() function
/freebsd-src/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZHazardRecognizer.cpp127 MID.getOperandConstraint(OpIdx, MCOI::TIED_TO) != -1) in has4RegOps()
H A DSystemZShortenInst.cpp69 if (MI.getDesc().getOperandConstraint(1, MCOI::TIED_TO) == 0 && in tieOpsIfNeeded()
/freebsd-src/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/
H A DRISCVBaseInfo.h234 Desc.getOperandConstraint(Desc.getNumDefs(), MCOI::TIED_TO) == 0; in getVXRMOpNum()
/freebsd-src/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVAsmPrinter.cpp980 assert(MCID.getOperandConstraint(OpNo, MCOI::TIED_TO) == 0 && in lowerRISCVVMachineInstrToMCInst()
985 if (OutMCID.getOperandConstraint(OutMI.getNumOperands(), MCOI::TIED_TO) < in lowerRISCVVMachineInstrToMCInst()
H A DRISCVISelDAGToDAG.cpp3885 assert(MaskedMCID.getOperandConstraint(MaskedMCID.getNumDefs(),
/freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DScheduleDAGSDNodes.cpp218 if (MCID.getOperandConstraint(I, MCOI::TIED_TO) != -1) in ClusterNeighboringLoads()
456 if (MCID.getOperandConstraint(i, MCOI::TIED_TO) != -1) { in AddSchedEdges()
H A DScheduleDAGFast.cpp252 if (MCID.getOperandConstraint(i, MCOI::TIED_TO) != -1) { in CopyAndMoveSuccessors()
H A DScheduleDAGRRList.cpp1033 if (MCID.getOperandConstraint(i, MCOI::TIED_TO) != -1) { in TryUnfoldSU()
2842 if (MCID.getOperandConstraint(i+NumRes, MCOI::TIED_TO) != -1) { in canClobber()
3082 if (MCID.getOperandConstraint(j+NumRes, MCOI::TIED_TO) == -1) in AddPseudoTwoAddrDeps()
H A DInstrEmitter.cpp386 bool isTied = MCID.getOperandConstraint(Idx, MCOI::TIED_TO) != -1; in AddOperand()
/freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/Disassembler/
H A DAMDGPUDisassembler.cpp728 int Tied = MCII->get(MI.getOpcode()).getOperandConstraint(VDstIn_Idx, in getInstruction()
874 if (OldIdx != -1 && Desc.getOperandConstraint( in convertSDWAInst()
877 assert(Desc.getOperandConstraint( in convertSDWAInst()
/freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/
H A DMachineInstr.cpp280 int DefIdx = MCID->getOperandConstraint(OpNo, MCOI::TIED_TO); in addOperand()
285 if (MCID->getOperandConstraint(OpNo, MCOI::EARLY_CLOBBER) != -1) in addOperand()
1590 int ExpectedTiedIdx = MCID.getOperandConstraint(I, MCOI::TIED_TO); in dumprImpl()
H A DTargetInstrInfo.cpp206 MI.getDesc().getOperandConstraint(Idx1, MCOI::TIED_TO) == 0) { in commuteInstructionImpl()
211 MI.getDesc().getOperandConstraint(Idx2, MCOI::TIED_TO) == 0) { in commuteInstructionImpl()
H A DMachineVerifier.cpp2420 int TiedTo = MCID.getOperandConstraint(MONum, MCOI::TIED_TO); in visitMachineOperand()
2477 if (-1 == MCID.getOperandConstraint(OtherIdx, MCOI::TIED_TO)) in checkLivenessAtDef()
/freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/Utils/
H A DAMDGPUBaseInfo.cpp669 assert(OpDesc.getOperandConstraint(Component::SRC0, MCOI::TIED_TO) == -1); in getRegIndices()
670 assert(OpDesc.getOperandConstraint(Component::SRC1, MCOI::TIED_TO) == -1); in getRegIndices()
671 auto TiedIdx = OpDesc.getOperandConstraint(Component::SRC2, MCOI::TIED_TO); in getRegIndices()
/freebsd-src/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DUtils.cpp193 int DefIdx = I.getDesc().getOperandConstraint(OpI, MCOI::TIED_TO); in constrainSelectedInstRegOperands()
/freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/
H A DAMDGPUAsmParser.cpp8534 && Desc.getOperandConstraint(OpNum + 1, in cvtVOPD()
9198 Desc.getOperandConstraint(OldIdx, MCOI::TIED_TO) == -1; in cvtSDWA()
9237 auto TiedTo = Desc.getOperandConstraint(Inst.getNumOperands(), in parseCustomOperand()
9309 auto TiedTo = Desc.getOperandConstraint(Inst.getNumOperands(), in parseEndpgm()
/freebsd-src/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstrInfo.cpp3039 if ((MI.getDesc().getOperandConstraint(Desc.getNumDefs(), in findCommutedOpIndices()
7326 bool Tied1 = 0 == MI.getDesc().getOperandConstraint(Idx1, MCOI::TIED_TO); in foldMemoryOperandImpl()
7327 bool Tied2 = 0 == MI.getDesc().getOperandConstraint(Idx2, MCOI::TIED_TO); in foldMemoryOperandImpl()
/freebsd-src/contrib/llvm-project/llvm/lib/Target/RISCV/AsmParser/
H A DRISCVAsmParser.cpp3541 int TiedOp = MCID.getOperandConstraint(1, MCOI::TIED_TO); in processInstruction()
/freebsd-src/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCInstrInfo.cpp1170 assert(MI.getDesc().getOperandConstraint(1, MCOI::TIED_TO) == 0 && in commuteInstructionImpl()
/freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/Disassembler/
H A DARMDisassembler.cpp1020 int TiedOp = MCID.getOperandConstraint(VCCPos + 3, MCOI::TIED_TO); in AddThumbPredicate()
/freebsd-src/contrib/llvm-project/llvm/lib/Target/AArch64/AsmParser/
H A DAArch64AsmParser.cpp5283 (MCID.getOperandConstraint(i, MCOI::TIED_TO) == -1) && in validateInstruction()
/freebsd-src/contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/
H A DARMAsmParser.cpp2556 int TiedOp = MCID.getOperandConstraint(NextOpIndex, MCOI::TIED_TO); in addRegShiftedImmOperands()

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