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Searched refs:base_addr (Results 1 – 25 of 28) sorted by relevance

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/dpdk/drivers/net/bnxt/hcapi/cfa/
H A Dhcapi_cfa_p4.c149 memcpy((uint8_t *)(uintptr_t)op->hw.base_addr + key_obj->offset, in hcapi_cfa_p4_key_hw_op_put()
161 (uint8_t *)(uintptr_t)op->hw.base_addr + key_obj->offset, in hcapi_cfa_p4_key_hw_op_get()
177 (uint8_t *)(uintptr_t)op->hw.base_addr + key_obj->offset, in hcapi_cfa_p4_key_hw_op_add()
186 memcpy((uint8_t *)(uintptr_t)op->hw.base_addr + key_obj->offset, in hcapi_cfa_p4_key_hw_op_add()
202 (uint8_t *)(uintptr_t)op->hw.base_addr + key_obj->offset, in hcapi_cfa_p4_key_hw_op_del()
225 memset((uint8_t *)(uintptr_t)op->hw.base_addr + key_obj->offset, 0, key_obj->size); in hcapi_cfa_p4_key_hw_op_del()
248 op->hw.base_addr = hcapi_get_table_page(em_tbl, page); in hcapi_cfa_p4_key_hw_op()
252 if (op->hw.base_addr == 0) in hcapi_cfa_p4_key_hw_op()
/dpdk/drivers/common/qat/dev/
H A Dqat_dev_gens.h33 void *base_addr, rte_spinlock_t *lock);
37 void *base_addr, rte_spinlock_t *lock);
95 void *base_addr, rte_spinlock_t *lock);
99 void *base_addr, rte_spinlock_t *lock);
H A Dqat_dev_gen1.c119 void *base_addr, rte_spinlock_t *lock) in qat_qp_adf_arb_enable_gen1() argument
127 value = ADF_CSR_RD(base_addr, in qat_qp_adf_arb_enable_gen1()
130 ADF_CSR_WR(base_addr, arb_csr_offset, value); in qat_qp_adf_arb_enable_gen1()
136 void *base_addr, rte_spinlock_t *lock) in qat_qp_adf_arb_disable_gen1() argument
143 value = ADF_CSR_RD(base_addr, arb_csr_offset); in qat_qp_adf_arb_disable_gen1()
145 ADF_CSR_WR(base_addr, arb_csr_offset, value); in qat_qp_adf_arb_disable_gen1()
H A Dqat_dev_gen_lce.c166 void *base_addr, rte_spinlock_t *lock) in qat_qp_adf_arb_enable_gen_lce() argument
173 value = ADF_CSR_RD(base_addr + ADF_RING_CSR_ADDR_OFFSET_GEN_LCEVF, arb_csr_offset); in qat_qp_adf_arb_enable_gen_lce()
175 ADF_CSR_WR(base_addr, arb_csr_offset, value); in qat_qp_adf_arb_enable_gen_lce()
180 qat_qp_adf_arb_disable_gen_lce(const struct qat_queue *txq, void *base_addr, rte_spinlock_t *lock) in qat_qp_adf_arb_disable_gen_lce() argument
187 value = ADF_CSR_RD(base_addr + ADF_RING_CSR_ADDR_OFFSET_GEN_LCEVF, arb_csr_offset); in qat_qp_adf_arb_disable_gen_lce()
189 ADF_CSR_WR(base_addr, arb_csr_offset, value); in qat_qp_adf_arb_disable_gen_lce()
H A Dqat_dev_gen4.c197 void *base_addr, rte_spinlock_t *lock) in qat_qp_adf_arb_enable_gen4() argument
205 value = ADF_CSR_RD(base_addr + ADF_RING_CSR_ADDR_OFFSET_GEN4VF, in qat_qp_adf_arb_enable_gen4()
208 ADF_CSR_WR(base_addr, arb_csr_offset, value); in qat_qp_adf_arb_enable_gen4()
214 void *base_addr, rte_spinlock_t *lock) in qat_qp_adf_arb_disable_gen4() argument
222 value = ADF_CSR_RD(base_addr + ADF_RING_CSR_ADDR_OFFSET_GEN4VF, in qat_qp_adf_arb_disable_gen4()
225 ADF_CSR_WR(base_addr, arb_csr_offset, value); in qat_qp_adf_arb_disable_gen4()
/dpdk/drivers/net/ngbe/
H A Dngbe_regs_group.h13 uint32_t base_addr; member
26 reg_buf[i] = rd32(hw, reg->base_addr + i * reg->stride); in ngbe_read_regs()
/dpdk/drivers/net/txgbe/
H A Dtxgbe_regs_group.h13 uint32_t base_addr; member
27 reg->base_addr + i * reg->stride); in txgbe_read_regs()
/dpdk/drivers/net/hns3/
H A Dhns3_rxtx_vec_sve.c219 svuint64_t base_addr, buf_iova, data_off, data_len, addr; in hns3_tx_fill_hw_ring_sve() local
227 base_addr = svld1_u64(pg, (uint64_t *)pkts); in hns3_tx_fill_hw_ring_sve()
230 buf_iova = svadd_n_u64_z(pg, base_addr, in hns3_tx_fill_hw_ring_sve()
233 buf_iova = svadd_n_u64_z(pg, base_addr, in hns3_tx_fill_hw_ring_sve()
237 data_off = svadd_n_u64_z(pg, base_addr, in hns3_tx_fill_hw_ring_sve()
240 data_len = svadd_n_u64_z(pg, base_addr, in hns3_tx_fill_hw_ring_sve()
243 svst1_u64(pg, (uint64_t *)tx_entry, base_addr); in hns3_tx_fill_hw_ring_sve()
/dpdk/drivers/net/atlantic/hw_atl/
H A Dhw_atl_b0.h16 int hw_atl_b0_hw_ring_tx_init(struct aq_hw_s *self, uint64_t base_addr,
18 int hw_atl_b0_hw_ring_rx_init(struct aq_hw_s *self, uint64_t base_addr,
H A Dhw_atl_b0.c416 int hw_atl_b0_hw_ring_rx_init(struct aq_hw_s *self, uint64_t base_addr, in hw_atl_b0_hw_ring_rx_init() argument
419 u32 dma_desc_addr_lsw = (u32)base_addr; in hw_atl_b0_hw_ring_rx_init()
420 u32 dma_desc_addr_msw = (u32)(base_addr >> 32); in hw_atl_b0_hw_ring_rx_init()
454 int hw_atl_b0_hw_ring_tx_init(struct aq_hw_s *self, uint64_t base_addr, in hw_atl_b0_hw_ring_tx_init() argument
457 u32 dma_desc_lsw_addr = (u32)base_addr; in hw_atl_b0_hw_ring_tx_init()
458 u32 dma_desc_msw_addr = (u32)(base_addr >> 32); in hw_atl_b0_hw_ring_tx_init()
/dpdk/drivers/crypto/qat/dev/
H A Dqat_sym_pmd_gen1.c519 (uint8_t *)tx_queue->base_addr + tail); in qat_sym_dp_enqueue_single_cipher_gen1()
523 rte_prefetch0((uint8_t *)tx_queue->base_addr + tail); in qat_sym_dp_enqueue_single_cipher_gen1()
572 (uint8_t *)tx_queue->base_addr + tail); in qat_sym_dp_enqueue_cipher_jobs_gen1()
632 (uint8_t *)tx_queue->base_addr + tail); in qat_sym_dp_enqueue_single_auth_gen1()
637 rte_prefetch0((uint8_t *)tx_queue->base_addr + tail); in qat_sym_dp_enqueue_single_auth_gen1()
693 (uint8_t *)tx_queue->base_addr + tail); in qat_sym_dp_enqueue_auth_jobs_gen1()
759 (uint8_t *)tx_queue->base_addr + tail); in qat_sym_dp_enqueue_single_chain_gen1()
763 rte_prefetch0((uint8_t *)tx_queue->base_addr + tail); in qat_sym_dp_enqueue_single_chain_gen1()
824 (uint8_t *)tx_queue->base_addr + tail); in qat_sym_dp_enqueue_chain_jobs_gen1()
897 (uint8_t *)tx_queue->base_addr + tail); in qat_sym_dp_enqueue_single_aead_gen1()
[all …]
H A Dqat_crypto_pmd_gen3.c599 (uint8_t *)tx_queue->base_addr + tail); in qat_sym_dp_enqueue_single_aead_gen3()
603 rte_prefetch0((uint8_t *)tx_queue->base_addr + tail); in qat_sym_dp_enqueue_single_aead_gen3()
649 (uint8_t *)tx_queue->base_addr + tail); in qat_sym_dp_enqueue_aead_jobs_gen3()
708 (uint8_t *)tx_queue->base_addr + tail); in qat_sym_dp_enqueue_single_auth_gen3()
713 rte_prefetch0((uint8_t *)tx_queue->base_addr + tail); in qat_sym_dp_enqueue_single_auth_gen3()
763 (uint8_t *)tx_queue->base_addr + tail); in qat_sym_dp_enqueue_auth_jobs_gen3()
/dpdk/drivers/crypto/bcmfs/hw/
H A Dbcmfs5_rm.c413 (uint8_t *)txq->base_addr + txq->tx_write_ptr, in bcmfs5_enqueue_single_request_qp()
414 txq->base_addr, in bcmfs5_enqueue_single_request_qp()
415 (uint8_t *)txq->base_addr + txq->queue_size); in bcmfs5_enqueue_single_request_qp()
426 (uint8_t *)txq->base_addr); in bcmfs5_enqueue_single_request_qp()
491 desc = *((uint64_t *)((uint8_t *)hwq->base_addr + in bcmfs5_dequeue_qp()
554 rm_write_desc((uint8_t *)tx_queue->base_addr + off, d); in bcmfs5_start_qp()
613 rm_write_desc((uint8_t *)cmpl_queue->base_addr + off, 0x0); in bcmfs5_start_qp()
H A Dbcmfs4_rm.c489 (uint8_t *)txq->base_addr + txq->tx_write_ptr, in bcmfs4_enqueue_single_request_qp()
491 txq->base_addr, in bcmfs4_enqueue_single_request_qp()
492 (uint8_t *)txq->base_addr + txq->queue_size); in bcmfs4_enqueue_single_request_qp()
503 (uint8_t *)txq->base_addr); in bcmfs4_enqueue_single_request_qp()
560 desc = *((uint64_t *)((uint8_t *)hwq->base_addr + in bcmfs4_dequeue_qp()
623 rm_write_desc((uint8_t *)tx_queue->base_addr + off, d); in bcmfs4_start_qp()
682 rm_write_desc((uint8_t *)cmpl_queue->base_addr + off, 0x0); in bcmfs4_start_qp()
/dpdk/drivers/compress/qat/
H A Dqat_comp.c360 uint8_t *base_addr = (uint8_t *)txq->base_addr; in qat_comp_build_multiple_requests() local
361 uint8_t *out_msg = base_addr + parent_tail; in qat_comp_build_multiple_requests()
437 comp_req = (struct icp_qat_fw_comp_req *)(base_addr + tail); in qat_comp_build_multiple_requests()
1168 register uint8_t *base_addr; in qat_enqueue_comp_op_burst() local
1180 base_addr = (uint8_t *)queue->base_addr; in qat_enqueue_comp_op_burst()
1241 base_addr + tail, cookie, tmp_qp->qat_dev_gen); in qat_enqueue_comp_op_burst()
/dpdk/drivers/net/hinic/base/
H A Dhinic_pmd_nicio.h24 #define HINIC_CI_VADDR(base_addr, q_id) \ argument
25 ((u8 *)(base_addr) + (q_id) * HINIC_CI_Q_ADDR_SIZE)
/dpdk/drivers/common/mlx5/
H A Dmlx5_common.c1318 void *base_addr; in mlx5_devx_alloc_uar() local
1359 base_addr = mlx5_os_get_devx_uar_base_addr(uar); in mlx5_devx_alloc_uar()
1360 if (base_addr) in mlx5_devx_alloc_uar()
1396 void *base_addr; in mlx5_devx_uar_prepare() local
1412 base_addr = mlx5_os_get_devx_uar_base_addr(uar_obj); in mlx5_devx_uar_prepare()
1415 uar->cq_db.db = RTE_PTR_ADD(base_addr, MLX5_CQ_DOORBELL); in mlx5_devx_uar_prepare()
/dpdk/drivers/crypto/bcmfs/
H A Dbcmfs_qp.h60 void *base_addr; member
/dpdk/drivers/net/bnx2x/
H A Dbnx2x_ethdev.c671 sc->bar[BAR0].base_addr = (void *)pci_dev->mem_resource[0].addr; in bnx2x_common_dev_init()
673 sc->bar[BAR1].base_addr = (void *) in bnx2x_common_dev_init()
676 sc->bar[BAR1].base_addr = pci_dev->mem_resource[2].addr; in bnx2x_common_dev_init()
678 assert(sc->bar[BAR0].base_addr); in bnx2x_common_dev_init()
679 assert(sc->bar[BAR1].base_addr); in bnx2x_common_dev_init()
H A Dbnx2x.h261 void *base_addr; member
1395 rte_write8(val, ((uint8_t *)sc->bar[BAR0].base_addr + offset)); in bnx2x_reg_write8()
1408 rte_write16(val, ((uint8_t *)sc->bar[BAR0].base_addr + offset)); in bnx2x_reg_write16()
1423 rte_write32(val, ((uint8_t *)sc->bar[BAR0].base_addr + offset)); in bnx2x_reg_write32()
1431 val = rte_read8((uint8_t *)sc->bar[BAR0].base_addr + offset); in bnx2x_reg_read8()
1449 val = rte_read16(((uint8_t *)sc->bar[BAR0].base_addr + offset)); in bnx2x_reg_read16()
1467 val = rte_read32(((uint8_t *)sc->bar[BAR0].base_addr + offset)); in bnx2x_reg_read32()
1474 #define REG_ADDR(sc, offset) (((uint64_t)sc->bar[BAR0].base_addr) + (offset))
1536 (volatile uint32_t *)(((char *)(sc)->bar[BAR1].base_addr + (offset)))
/dpdk/drivers/common/mlx5/linux/
H A Dmlx5_common_os.h156 return ((struct mlx5dv_devx_uar *)uar)->base_addr; in mlx5_os_get_devx_uar_base_addr()
H A Dmlx5_glue.h69 struct mlx5dv_devx_uar { void *reg_addr; void *base_addr; uint32_t page_id; }; member
/dpdk/drivers/crypto/octeontx/
H A Dotx_cryptodev_hw_access.c260 uint64_t base_addr = 0; in otx_cpt_vfvq_init() local
271 base_addr = (uint64_t)(cptvf->cqueue.chead[0].dma_addr); in otx_cpt_vfvq_init()
272 otx_cpt_write_vq_saddr(cptvf, base_addr); in otx_cpt_vfvq_init()
/dpdk/drivers/common/qat/
H A Dqat_qp.h23 void *base_addr; /* Base address */ member
/dpdk/drivers/net/dpaa/fmlib/
H A Dfm_port_ext.h1489 uintptr_t base_addr; member

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