Searched refs:reg_operands (Results 1 – 4 of 4) sorted by relevance
321 unsigned int reg_operands, disp_operands, mem_operands, imm_operands; member3507 if (i.reg_operands > 1 in build_vex_prefix()3510 && i.operands == i.reg_operands in build_vex_prefix()3543 if (i.reg_operands >= 3 in build_vex_prefix()3545 && i.reg_operands == i.operands - i.imm_operands in build_vex_prefix()3553 unsigned int xchg = i.operands - i.reg_operands; in build_vex_prefix()3793 if ((i.reg_operands + i.imm_operands) == i.operands) in build_evex_prefix()3994 && i.reg_operands == 1 in optimize_encoding()4027 && i.reg_operands == 1 in optimize_encoding()4045 && ((i.reg_operands == 2 in optimize_encoding()[all …]
842 ++i.reg_operands; in i386_intel_operand()
302 unsigned int reg_operands, disp_operands, mem_operands, imm_operands; member3131 && i.operands == i.reg_operands in build_vex_prefix()3338 if ((i.reg_operands + i.imm_operands) == i.operands) in build_evex_prefix()3629 if (i.reg_operands != 2 in md_assemble()3716 i.reg_operands--; in md_assemble()4248 else if (i.reg_operands) in optimize_imm()4509 gas_assert (i.reg_operands == 2 || i.mask); in check_VecOperands()4510 if (i.reg_operands == 2 && !i.mask) in check_VecOperands()4532 else if (i.reg_operands == 1 && i.mask) in check_VecOperands()5252 else if (i.reg_operands) in process_suffix()[all …]
816 ++i.reg_operands; in i386_intel_operand()