Home
last modified time | relevance | path

Searched refs:ref_div (Results 1 – 25 of 25) sorted by relevance

/dflybsd-src/sys/dev/drm/amd/amdgpu/
H A Damdgpu_pll.c85 unsigned *fb_div, unsigned *ref_div) in amdgpu_pll_get_fb_ref_div() argument
91 *ref_div = min(max(DIV_ROUND_CLOSEST(den, post_div), 1u), ref_div_max); in amdgpu_pll_get_fb_ref_div()
92 *fb_div = DIV_ROUND_CLOSEST(nom * *ref_div * post_div, den); in amdgpu_pll_get_fb_ref_div()
96 *ref_div = DIV_ROUND_CLOSEST(*ref_div * fb_div_max, *fb_div); in amdgpu_pll_get_fb_ref_div()
127 unsigned ref_div_min, ref_div_max, ref_div; in amdgpu_pll_compute() local
202 ref_div_max, &fb_div, &ref_div); in amdgpu_pll_compute()
204 (ref_div * post_div)); in amdgpu_pll_compute()
217 &fb_div, &ref_div); in amdgpu_pll_compute()
221 amdgpu_pll_reduce_ratio(&fb_div, &ref_div, fb_div_min, ref_div_min); in amdgpu_pll_compute()
229 ref_div *= tmp; in amdgpu_pll_compute()
[all …]
H A Datombios_crtc.c582 u32 ref_div, in amdgpu_atombios_crtc_program_pll() argument
609 args.v1.usRefDiv = cpu_to_le16(ref_div); in amdgpu_atombios_crtc_program_pll()
619 args.v2.usRefDiv = cpu_to_le16(ref_div); in amdgpu_atombios_crtc_program_pll()
629 args.v3.usRefDiv = cpu_to_le16(ref_div); in amdgpu_atombios_crtc_program_pll()
646 args.v5.ucRefDiv = ref_div; in amdgpu_atombios_crtc_program_pll()
676 args.v6.ucRefDiv = ref_div; in amdgpu_atombios_crtc_program_pll()
826 u32 ref_div = 0, fb_div = 0, frac_fb_div = 0, post_div = 0; in amdgpu_atombios_crtc_set_pll() local
855 &fb_div, &frac_fb_div, &ref_div, &post_div); in amdgpu_atombios_crtc_set_pll()
862 ref_div, fb_div, frac_fb_div, post_div, in amdgpu_atombios_crtc_set_pll()
875 step_size = (4 * amount * ref_div * ((u32)amdgpu_crtc->ss.rate * 2048)) / in amdgpu_atombios_crtc_set_pll()
[all …]
H A Datombios_crtc.h48 u32 ref_div,
H A Damdgpu_atombios.h43 u32 ref_div; member
H A Damdgpu_atombios.c1029 dividers->ref_div = args.v3.ucRefDiv; in amdgpu_atombios_get_clock_dividers()
1049 dividers->ref_div = args.v5.ucRefDiv; in amdgpu_atombios_get_clock_dividers()
1073 dividers->ref_div = args.v6_out.ucPllRefDiv; in amdgpu_atombios_get_clock_dividers()
H A Dsi_dpm.h571 u32 ref_div; member
H A Dsi_dpm.c5267 reference_divider = 1 + dividers.ref_div; in si_calculate_sclk_params()
5274 spll_func_cntl |= SPLL_REF_DIV(dividers.ref_div); in si_calculate_sclk_params()
7373 pi->ref_div = dividers.ref_div + 1; in si_dpm_init()
7375 pi->ref_div = R600_REFERENCEDIVIDER_DFLT; in si_dpm_init()
/dflybsd-src/sys/dev/drm/radeon/
H A Dradeon_clocks.c39 uint32_t fb_div, ref_div, post_div, sclk; in radeon_legacy_get_engine_clock() local
46 ref_div = in radeon_legacy_get_engine_clock()
49 if (ref_div == 0) in radeon_legacy_get_engine_clock()
52 sclk = fb_div / ref_div; in radeon_legacy_get_engine_clock()
69 uint32_t fb_div, ref_div, post_div, mclk; in radeon_legacy_get_memory_clock() local
76 ref_div = in radeon_legacy_get_memory_clock()
79 if (ref_div == 0) in radeon_legacy_get_memory_clock()
82 mclk = fb_div / ref_div; in radeon_legacy_get_memory_clock()
352 int ref_div = spll->reference_div; in calc_eng_mem_clock() local
354 if (!ref_div) in calc_eng_mem_clock()
[all …]
H A Dradeon_display.c920 unsigned *fb_div, unsigned *ref_div) in avivo_get_fb_ref_div() argument
926 *ref_div = min(max(DIV_ROUND_CLOSEST(den, post_div), 1u), ref_div_max); in avivo_get_fb_ref_div()
927 *fb_div = DIV_ROUND_CLOSEST(nom * *ref_div * post_div, den); in avivo_get_fb_ref_div()
931 *ref_div = DIV_ROUND_CLOSEST(*ref_div * fb_div_max, *fb_div); in avivo_get_fb_ref_div()
962 unsigned ref_div_min, ref_div_max, ref_div; in radeon_compute_pll_avivo() local
1040 ref_div_max, &fb_div, &ref_div); in radeon_compute_pll_avivo()
1042 (ref_div * post_div)); in radeon_compute_pll_avivo()
1055 &fb_div, &ref_div); in radeon_compute_pll_avivo()
1059 avivo_reduce_ratio(&fb_div, &ref_div, fb_div_min, ref_div_min); in radeon_compute_pll_avivo()
1067 ref_div *= tmp; in radeon_compute_pll_avivo()
[all …]
H A Drv740_dpm.c142 reference_divider = 1 + dividers.ref_div; in rv740_populate_sclk_value()
149 spll_func_cntl |= SPLL_REF_DIV(dividers.ref_div); in rv740_populate_sclk_value()
217 mpll_ad_func_cntl |= CLKR(dividers.ref_div); in rv740_populate_mclk_value()
234 mpll_dq_func_cntl |= CLKR(dividers.ref_div); in rv740_populate_mclk_value()
253 u32 decoded_ref = rv740_get_decoded_reference_divider(dividers.ref_div); in rv740_populate_mclk_value()
H A Drs780_dpm.c86 r600_engine_clock_entry_set_reference_divider(rdev, 0, dividers.ref_div); in rs780_initialize_dpm_power_state()
453 if ((min_dividers.ref_div != max_dividers.ref_div) || in rs780_set_engine_clock_scaling()
455 (max_dividers.ref_div != current_max_dividers.ref_div) || in rs780_set_engine_clock_scaling()
987 u32 ref_div = ((func_cntl & SPLL_REF_DIV_MASK) >> SPLL_REF_DIV_SHIFT) + 1; in rs780_dpm_debugfs_print_current_performance_level() local
991 (post_div * ref_div); in rs780_dpm_debugfs_print_current_performance_level()
1009 u32 ref_div = ((func_cntl & SPLL_REF_DIV_MASK) >> SPLL_REF_DIV_SHIFT) + 1; in rs780_dpm_get_current_sclk() local
1013 (post_div * ref_div); in rs780_dpm_get_current_sclk()
H A Datombios_crtc.c826 u32 ref_div, in atombios_crtc_program_pll() argument
853 args.v1.usRefDiv = cpu_to_le16(ref_div); in atombios_crtc_program_pll()
863 args.v2.usRefDiv = cpu_to_le16(ref_div); in atombios_crtc_program_pll()
873 args.v3.usRefDiv = cpu_to_le16(ref_div); in atombios_crtc_program_pll()
890 args.v5.ucRefDiv = ref_div; in atombios_crtc_program_pll()
919 args.v6.ucRefDiv = ref_div; in atombios_crtc_program_pll()
1069 u32 ref_div = 0, fb_div = 0, frac_fb_div = 0, post_div = 0; in atombios_crtc_set_pll() local
1101 &fb_div, &frac_fb_div, &ref_div, &post_div); in atombios_crtc_set_pll()
1104 &fb_div, &frac_fb_div, &ref_div, &post_div); in atombios_crtc_set_pll()
1107 &fb_div, &frac_fb_div, &ref_div, &post_div); in atombios_crtc_set_pll()
[all …]
H A Drv730_dpm.c62 reference_divider = 1 + dividers.ref_div; in rv730_populate_sclk_value()
80 spll_func_cntl |= SPLL_REF_DIV(dividers.ref_div); in rv730_populate_sclk_value()
140 reference_divider = dividers.ref_div + 1; in rv730_populate_mclk_value()
155 mpll_func_cntl |= MPLL_REF_DIV(dividers.ref_div); in rv730_populate_mclk_value()
H A Drv770_dpm.c338 reference_divider = dividers->ref_div; in rv770_calculate_fractional_mpll_feedback_divider()
419 if ((dividers.ref_div < 1) || (dividers.ref_div > 5)) in rv770_populate_mclk_value()
437 mpll_ad_func_cntl |= CLKR(encoded_reference_dividers[dividers.ref_div - 1]); in rv770_populate_mclk_value()
465 mpll_dq_func_cntl |= CLKR(encoded_reference_dividers[dividers.ref_div - 1]); in rv770_populate_mclk_value()
515 reference_divider = 1 + dividers.ref_div; in rv770_populate_sclk_value()
531 spll_func_cntl |= SPLL_REF_DIV(dividers.ref_div); in rv770_populate_sclk_value()
815 (MPLL_LOCK_TIME(R600_MPLLLOCKTIME_DFLT * pi->ref_div) | in rv770_program_mpll_timing_parameters()
2380 pi->ref_div = dividers.ref_div + 1; in rv770_dpm_init()
2382 pi->ref_div = R600_REFERENCEDIVIDER_DFLT; in rv770_dpm_init()
H A Drv6xx_dpm.c531 (dividers->ref_div + 1); in rv6xx_calculate_vco_frequency()
568 (ref_clk / (dividers.ref_div + 1)), in rv6xx_program_engine_spread_spectrum()
574 (ref_clk / (dividers.ref_div + 1))); in rv6xx_program_engine_spread_spectrum()
607 rv6xx_memory_clock_entry_set_reference_divider(rdev, entry, dividers.ref_div); in rv6xx_program_mclk_stepping_entry()
686 (ref_clk / (dividers.ref_div + 1)), in rv6xx_program_mclk_spread_spectrum_parameters()
692 (ref_clk / (dividers.ref_div + 1))); in rv6xx_program_mclk_spread_spectrum_parameters()
1960 pi->spll_ref_div = dividers.ref_div + 1; in rv6xx_dpm_init()
1967 pi->mpll_ref_div = dividers.ref_div + 1; in rv6xx_dpm_init()
H A Dradeon_legacy_crtc.c263 static uint8_t radeon_compute_pll_gain(uint16_t ref_freq, uint16_t ref_div, in radeon_compute_pll_gain() argument
268 if (!ref_div) in radeon_compute_pll_gain()
271 vcoFreq = ((unsigned)ref_freq * fb_div) / ref_div; in radeon_compute_pll_gain()
H A Dcypress_dpm.c519 mpll_ad_func_cntl |= CLKR(dividers.ref_div); in cypress_populate_mclk_value()
536 mpll_dq_func_cntl |= CLKR(dividers.ref_div); in cypress_populate_mclk_value()
560 u32 decoded_ref = rv740_get_decoded_reference_divider(dividers.ref_div); in cypress_populate_mclk_value()
2058 pi->ref_div = dividers.ref_div + 1; in cypress_dpm_init()
2060 pi->ref_div = R600_REFERENCEDIVIDER_DFLT; in cypress_dpm_init()
H A Drv770_dpm.h114 u32 ref_div; member
H A Dni_dpm.c2020 reference_divider = 1 + dividers.ref_div; in ni_calculate_sclk_params()
2028 spll_func_cntl |= SPLL_REF_DIV(dividers.ref_div); in ni_calculate_sclk_params()
2200 mpll_ad_func_cntl |= CLKR(dividers.ref_div); in ni_populate_mclk_value()
2217 mpll_dq_func_cntl |= CLKR(dividers.ref_div); in ni_populate_mclk_value()
2241 u32 decoded_ref = rv740_get_decoded_reference_divider(dividers.ref_div); in ni_populate_mclk_value()
4103 pi->ref_div = dividers.ref_div + 1; in ni_dpm_init()
4105 pi->ref_div = R600_REFERENCEDIVIDER_DFLT; in ni_dpm_init()
H A Dbtc_dpm.c2605 pi->ref_div = dividers.ref_div + 1; in btc_dpm_init()
2607 pi->ref_div = R600_REFERENCEDIVIDER_DFLT; in btc_dpm_init()
H A Dr600.c195 unsigned fb_div = 0, ref_div, vclk_div = 0, dclk_div = 0; in r600_set_uvd_clocks() local
218 ref_div = 34; in r600_set_uvd_clocks()
220 ref_div = 4; in r600_set_uvd_clocks()
223 ref_div + 1, 0xFFF, 2, 30, ~0, in r600_set_uvd_clocks()
248 UPLL_REF_DIV(ref_div), in r600_set_uvd_clocks()
H A Dradeon_mode.h601 u32 ref_div; member
H A Dradeon_atombios.c2856 dividers->ref_div = args.v2.ucAction; in radeon_atom_get_clock_dividers()
2876 dividers->ref_div = args.v3.ucRefDiv; in radeon_atom_get_clock_dividers()
2896 dividers->ref_div = args.v5.ucRefDiv; in radeon_atom_get_clock_dividers()
2921 dividers->ref_div = args.v6_out.ucPllRefDiv; in radeon_atom_get_clock_dividers()
H A Dsi_dpm.c4804 reference_divider = 1 + dividers.ref_div; in si_calculate_sclk_params()
4811 spll_func_cntl |= SPLL_REF_DIV(dividers.ref_div); in si_calculate_sclk_params()
6968 pi->ref_div = dividers.ref_div + 1; in si_dpm_init()
6970 pi->ref_div = R600_REFERENCEDIVIDER_DFLT; in si_dpm_init()
H A Dci_dpm.c3214 reference_divider = 1 + dividers.ref_div; in ci_calculate_sclk_params()