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/dflybsd-src/contrib/gcc-4.7/gcc/config/i386/
H A Ddriver-i386.c379 enum processor_type processor = PROCESSOR_I386; in host_detect_local_cpu() local
541 processor = PROCESSOR_GEODE; in host_detect_local_cpu()
543 processor = PROCESSOR_BDVER2; in host_detect_local_cpu()
545 processor = PROCESSOR_BDVER1; in host_detect_local_cpu()
547 processor = PROCESSOR_BTVER1; in host_detect_local_cpu()
549 processor = PROCESSOR_AMDFAM10; in host_detect_local_cpu()
551 processor = PROCESSOR_K8; in host_detect_local_cpu()
553 processor = PROCESSOR_ATHLON; in host_detect_local_cpu()
555 processor = PROCESSOR_K6; in host_detect_local_cpu()
557 processor = PROCESSOR_PENTIUM; in host_detect_local_cpu()
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/dflybsd-src/contrib/gcc-8.0/gcc/config/i386/
H A Ddriver-i386.c385 enum processor_type processor = PROCESSOR_I386; in host_detect_local_cpu() local
645 processor = PROCESSOR_GEODE; in host_detect_local_cpu()
647 processor = PROCESSOR_BTVER2; in host_detect_local_cpu()
649 processor = PROCESSOR_ZNVER1; in host_detect_local_cpu()
651 processor = PROCESSOR_BDVER4; in host_detect_local_cpu()
653 processor = PROCESSOR_BDVER3; in host_detect_local_cpu()
655 processor = PROCESSOR_BDVER2; in host_detect_local_cpu()
657 processor = PROCESSOR_BDVER1; in host_detect_local_cpu()
659 processor = PROCESSOR_BTVER1; in host_detect_local_cpu()
661 processor = PROCESSOR_AMDFAM10; in host_detect_local_cpu()
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/dflybsd-src/contrib/binutils-2.27/gas/doc/
H A Dc-mt.texi30 @item -march=@var{processor}
31 This option specifies the target processor. The assembler will issue an
33 will not execute on the target processor. The following processor names are
H A Dc-v850.texi22 for the V850 processor family:
45 the V850 processor. This allows the linker to detect attempts to link
51 the V850E processor. This allows the linker to detect attempts to link
57 the V850E1 processor. This allows the linker to detect attempts to link
63 the V850 processor but support instructions that are specific to the
74 the V850E2 processor. This allows the linker to detect attempts to link
80 the V850E2V3 processor. This allows the linker to detect attempts to link
90 the V850E3V5 processor. This allows the linker to detect attempts to link
303 the V850 processor. This allows the linker to detect attempts to link
309 the V850E processor. This allows the linker to detect attempts to link
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H A Dc-aarch64.texi40 be marked as being encoded for a big-endian processor.
45 be marked as being encoded for a little-endian processor.
54 @item -mcpu=@var{processor}[+@var{extension}@dots{}]
55 This option specifies the target processor. The assembler will issue an error
57 on the target processor. The following processor names are recognized:
71 instructions valid for any supported processor, including all optional
76 processor. @xref{AArch64 Extensions}.
78 If some implementations of a particular processor can have an
286 Set the target processor. Valid values for @var{name} are the same as
H A Dc-arm.texi36 @item -mcpu=@var{processor}[+@var{extension}@dots{}]
37 This option specifies the target processor. The assembler will issue an
39 will not execute on the target processor. The following processor names are
84 @code{fa526} (Faraday FA526 processor),
85 @code{fa626} (Faraday FA626 processor),
104 @code{fa606te} (Faraday FA606TE processor),
105 @code{fa616te} (Faraday FA616TE processor),
106 @code{fa626te} (Faraday FA626TE processor),
107 @code{fmp626} (Faraday FMP626 processor),
108 @code{fa726te} (Faraday FA726TE processor),
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H A Dc-ns32k.texi12 specify thiat it is compiling for a 32032 processor, or a
19 @code{@value{AS}}. Someone who understands the processor (I've never seen
H A Dc-bfin.texi33 @item -mcpu=@var{processor}@r{[}-@var{sirevision}@r{]}
34 This option specifies the target processor. The optional @var{sirevision}
38 will not execute on the target processor. The following processor names are
H A Dc-alpha.texi45 This option specifies the target processor. If an attempt is made to
46 assemble an instruction which will not execute on the target processor,
50 The following processor names are recognized:
71 instructions valid for any Alpha processor.
75 numbered processor names (e.g.@: 21064) enable the processor-specific PALcode
349 Specifies the target processor. This is equivalent to the
H A Dc-sparc.texi344 The V8 co-processor queue register is referred to as @samp{%cq}.
359 The V9 processor interrupt level register is referred to as @samp{%pil}.
362 The V9 processor state register is referred to as @samp{%pstate}.
404 The V8 processor state register is referred to as @samp{%psr}.
414 The hyperprivileged processor state register is referred to as
492 processor. This corresponds to @code{membar} mmask field bit 2.
564 The actual behavior of a given prefetch function code is processor
565 specific. If a processor does not implement a given prefetch
572 See the V9 and processor specific manuals for details.
903 On the Sparc V9 processor, the @code{.xword} directive produces
H A Dc-z80.texi35 Produce code for the Z80 processor. There are additional options to
61 Produce code for the R800 processor. The assembler does not support
64 for the R800 processor, as far as they exist.
H A Dc-arc.texi79 be marked as being encoded for a big-endian processor.
84 be marked as being encoded for a little-endian processor - this is the
242 In addition the ARC processor has a large number of @emph{auxiliary
331 processor architecture version and extensions selected by the options.
622 Reference Manual}, available where you download the processor IP library.
H A Dc-i386.texi90 This option specifies the target processor. The assembler will
92 which will not execute on the target processor. The following
93 processor names are recognized:
237 This option specifies a processor to optimize for. When used in
239 of the processor specified by the @option{-march} option will be
242 Valid @var{CPU} values are identical to the processor list of
687 the 5 processor control registers @samp{%cr0}, @samp{%cr2},
1041 Cyrix' M2 processor, and probably others. It also supports AMD's 3DNow!@:
1043 available on AMD's K6-2 processor and possibly others in the future.
1137 necessarily run on a 16-bit pre-80386 processor. To write code that
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/dflybsd-src/contrib/file/magic/Magdir/
H A Dm46 >0 regex \^dnl\ M4 macro processor script text
9 >0 regex \^AC_DEFUN\\(\\[ M4 macro processor script text
H A Delf74 >>18 leshort !8 processor-specific,
78 >>>16 leshort !0xFF80 processor-specific,
292 >18 leshort 244 Lanai 32-bit processor,
300 >18 leshort 252 C-SKY processor family,
302 >18 leshort 254 MOS Technology MCS 6502 processor,
H A Dolf42 >>16 leshort &0xff00 processor-specific,
73 >>16 beshort &0xff00 processor-specific,
H A Dpsdbms8 # AppleWorks word processor
H A Dalliant6 # If the FX series is the one that had a processor with a 68K-derived
H A Dclaris6 # Claris Works a word processor, etc.
H A Dmacintosh230 >0 string AWWP AppleWorks word processor
260 >0 string WDBN Microsoft Word word processor
261 >0 string WORD MacWrite word processor
269 >0 string nX^d WriteNow word processor
281 #>0 string W4BN Microsoft Word x.y word processor?
H A Dvaried.out7 # Most have been moved to files for a particular processor,
/dflybsd-src/usr.bin/m4/
H A DNOTES1 m4 - macro processor
6 most of the command set of SysV m4, the standard UN*X macro processor.
/dflybsd-src/contrib/binutils-2.27/include/
H A Dieee.h27 char *processor; member
/dflybsd-src/contrib/gdb-7/gdb/
H A Dconfigure.tgt126 # Target: Blackfin processor
137 # Target: Fujitsu FRV processor
302 # Target: Renesas m32r processor
309 # Target: Motorola 68HC11 processor
399 # Target: Morpho Technologies ms1 processor
611 # Target: Sanyo Xstormy16a processor
617 # Target: NEC V850 processor
/dflybsd-src/sys/bus/pci/
H A Dpcidevs301 product BROADCOM 5801 0x5801 5801 Security processor
302 product BROADCOM 5802 0x5802 5802 Security processor
303 product BROADCOM 5805 0x5805 5805 Security processor
304 product BROADCOM 5820 0x5820 5820 Security processor
305 product BROADCOM 5821 0x5821 5821 Security processor
306 product BROADCOM 5822 0x5822 5822 Security processor
307 product BROADCOM 5823 0x5823 5823 Security processor

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