Home
last modified time | relevance | path

Searched refs:mmSPI_START_PHASE_BASE_IDX (Results 1 – 3 of 3) sorted by relevance

/dflybsd-src/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h679 #define mmSPI_START_PHASE_BASE_IDX … macro
H A Dgc_9_1_offset.h663 #define mmSPI_START_PHASE_BASE_IDX … macro
H A Dgc_9_2_1_offset.h641 #define mmSPI_START_PHASE_BASE_IDX … macro