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Searched refs:mmSPI_PS_INPUT_CNTL_21 (Results 1 – 8 of 8) sorted by relevance

/dflybsd-src/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_d.h1234 #define mmSPI_PS_INPUT_CNTL_21 0xA1A6 macro
H A Dgfx_7_2_d.h1399 #define mmSPI_PS_INPUT_CNTL_21 0xa1a6 macro
H A Dgfx_7_0_d.h1382 #define mmSPI_PS_INPUT_CNTL_21 0xa1a6 macro
H A Dgfx_8_1_d.h1546 #define mmSPI_PS_INPUT_CNTL_21 0xa1a6 macro
H A Dgfx_8_0_d.h1578 #define mmSPI_PS_INPUT_CNTL_21 0xa1a6 macro
/dflybsd-src/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h3841 #define mmSPI_PS_INPUT_CNTL_21 … macro
H A Dgc_9_1_offset.h4128 #define mmSPI_PS_INPUT_CNTL_21 … macro
H A Dgc_9_2_1_offset.h4080 #define mmSPI_PS_INPUT_CNTL_21 … macro