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Searched refs:mmSDMA0_PHASE1_QUANTUM_BASE_IDX (Results 1 – 2 of 2) sorted by relevance

/dflybsd-src/sys/dev/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_offset.h103 #define mmSDMA0_PHASE1_QUANTUM_BASE_IDX … macro
H A Dsdma0_4_0_offset.h105 #define mmSDMA0_PHASE1_QUANTUM_BASE_IDX 0 macro