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Searched refs:mmMP0_SMN_C2PMSG_58 (Results 1 – 3 of 3) sorted by relevance

/dflybsd-src/sys/dev/drm/amd/include/asic_reg/mp/
H A Dmp_10_0_offset.h80 #define mmMP0_SMN_C2PMSG_58 … macro
H A Dmp_9_0_offset.h80 #define mmMP0_SMN_C2PMSG_58 0x007a macro
/dflybsd-src/sys/dev/drm/amd/amdgpu/
H A Dpsp_v3_1.c272 ver = RREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_58); in psp_v3_1_bootloader_load_sos()