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Searched refs:mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED20 (Results 1 – 5 of 5) sorted by relevance

/dflybsd-src/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_11_0_d.h1715 #define mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED20 0x48d4 macro
H A Ddce_10_0_d.h1845 #define mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED20 0x48d4 macro
H A Ddce_11_2_d.h1806 #define mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED20 0x48d4 macro
H A Ddce_12_0_offset.h12058 #define mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED20 … macro
/dflybsd-src/sys/dev/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_offset.h10675 #define mmDCIO_UNIPHY0_UNIPHY_MACRO_CNTL_RESERVED20 … macro