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Searched refs:ixDIDT_TCP_EDC_CTRL (Results 1 – 4 of 4) sorted by relevance

/dflybsd-src/sys/dev/drm/amd/powerplay/hwmgr/
H A Dvega10_powertune.c915 data = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__DIDT, ixDIDT_TCP_EDC_CTRL); in vega10_didt_set_mask()
918 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__DIDT, ixDIDT_TCP_EDC_CTRL, data); in vega10_didt_set_mask()
/dflybsd-src/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h7171 #define ixDIDT_TCP_EDC_CTRL … macro
H A Dgc_9_1_offset.h7434 #define ixDIDT_TCP_EDC_CTRL … macro
H A Dgc_9_2_1_offset.h7474 #define ixDIDT_TCP_EDC_CTRL … macro