Home
last modified time | relevance | path

Searched refs:htotal (Results 1 – 25 of 30) sorted by relevance

12

/dflybsd-src/sys/dev/drm/
H A Ddrm_modes.c277 drm_mode->htotal = drm_mode->hdisplay + hblank; in drm_cvt_mode()
280 (drm_mode->htotal * CVT_HSYNC_PERCENTAGE) / 100; in drm_cvt_mode()
311 drm_mode->htotal = drm_mode->hdisplay + CVT_RB_H_BLANK; in drm_cvt_mode()
320 tmp = drm_mode->htotal; /* perform intermediate calcs in u64 */ in drm_cvt_mode()
509 drm_mode->htotal = total_pixels; in drm_gtf_mode_complex()
590 dmode->htotal = dmode->hsync_end + vm->hback_porch; in drm_display_mode_from_videomode()
630 vm->hback_porch = dmode->htotal - dmode->hsync_end; in drm_display_mode_to_videomode()
751 if (mode->htotal < 0) in drm_mode_hsync()
754 calc_val = (mode->clock * 1000) / mode->htotal; /* hsync in Hz */ in drm_mode_hsync()
777 else if (mode->htotal > 0 && mode->vtotal > 0) { in drm_mode_vrefresh()
[all …]
H A Ddrm_edid.c1834 return (mode->htotal - mode->hdisplay == 160) && in mode_is_rb()
2253 mode->htotal = mode->hdisplay + hblank; in drm_mode_detailed()
2261 if (mode->hsync_end > mode->htotal) in drm_mode_detailed()
2262 mode->htotal = mode->hsync_end + 1; in drm_mode_detailed()
4566 mode->htotal = mode->hdisplay + hblank; in drm_mode_displayid_detailed()
/dflybsd-src/sys/dev/drm/amd/display/dc/calcs/
H A Ddcn_calc_auto.c176 …eil2(v->byte_per_pixel_in_detc[k], 2.0) / 2.0 * v->v_ratio[k] / 2) / (v->htotal[k] / v->pixel_cloc… in mode_support_and_system_configuration()
194 v->write_bandwidth[k] = v->scaler_rec_out_width[k] / (v->htotal[k] / v->pixel_clock[k]) * 4.0; in mode_support_and_system_configuration()
197 v->write_bandwidth[k] = v->scaler_rec_out_width[k] / (v->htotal[k] / v->pixel_clock[k]) * 1.5; in mode_support_and_system_configuration()
242 …&& v->output_format[k] == dcn_bw_444 && v->scaler_rec_out_width[k] / (v->htotal[k] / v->pixel_cloc… in mode_support_and_system_configuration()
245 …else if (v->output[k] == dcn_bw_writeback && v->scaler_rec_out_width[k] / (v->htotal[k] / v->pixel… in mode_support_and_system_configuration()
559 …v->urgent_latency_support_us_per_state[i][j][k] = v->effective_detlb_lines_luma * (v->htotal[k] / … in mode_support_and_system_configuration()
562htotal[k] / v->pixel_clock[k]) / v->v_ratio[k] - v->effective_detlb_lines_luma * v->swath_width_yp… in mode_support_and_system_configuration()
785 v->v_update_offset[k][j] = dcn_bw_ceil2(v->htotal[k] / 4.0, 1.0); in mode_support_and_system_configuration()
800htotal[k] / v->pixel_clock[k]) - (v->time_calc + v->time_setup) / (v->htotal[k] / v->pixel_clock[k… in mode_support_and_system_configuration()
802 …->byte_per_pixel_in_detc[k], 2.0)) / (v->line_times_for_prefetch[k] * v->htotal[k] / v->pixel_cloc… in mode_support_and_system_configuration()
[all …]
H A Ddcn_calcs.c407 input->dest.htotal = pipe->stream->timing.h_total; in pipe_ctx_to_e2e_pipe_params()
408 input->dest.hblank_start = input->dest.htotal - pipe->stream->timing.h_front_porch; in pipe_ctx_to_e2e_pipe_params()
842 v->htotal[input_idx] = pipe->stream->timing.h_total; in dcn_validate_bandwidth()
1097 pipe->pipe_dlg_param.htotal = pipe->stream->timing.h_total; in dcn_validate_bandwidth()
1138 hsplit_pipe->pipe_dlg_param.htotal = pipe->stream->timing.h_total; in dcn_validate_bandwidth()
/dflybsd-src/sys/dev/drm/i915/
H A Dintel_tv.c313 u16 hblank_start, hblank_end, htotal; member
389 .hblank_start = 836, .htotal = 857,
431 .hblank_start = 836, .htotal = 857,
474 .hblank_start = 836, .htotal = 857,
517 .hblank_start = 836, .htotal = 857,
560 .hblank_start = 844, .htotal = 863,
605 .hblank_start = 844, .htotal = 863,
647 .hblank_start = 842, .htotal = 857,
671 .hblank_start = 859, .htotal = 863,
695 .hblank_start = 1580, .htotal = 1649,
[all …]
H A Di915_irq.c737 u32 high1, high2, low, pixel, vbl_start, hsync_start, htotal; in i915_get_vblank_counter() local
741 htotal = mode->crtc_htotal; in i915_get_vblank_counter()
748 vbl_start *= htotal; in i915_get_vblank_counter()
751 vbl_start -= htotal - hsync_start; in i915_get_vblank_counter()
806 u32 htotal = mode->crtc_htotal; in __intel_get_crtc_scanline_from_timestamp() local
834 clock), 1000 * htotal); in __intel_get_crtc_scanline_from_timestamp()
910 int vbl_start, vbl_end, hsync_start, htotal, vtotal; in i915_get_crtc_scanoutpos() local
919 htotal = mode->crtc_htotal; in i915_get_crtc_scanoutpos()
957 vbl_start *= htotal; in i915_get_crtc_scanoutpos()
958 vbl_end *= htotal; in i915_get_crtc_scanoutpos()
[all …]
H A Ddvo_ns2501.c531 mode->hdisplay, mode->htotal, mode->vdisplay, mode->vtotal); in ns2501_mode_valid()
558 mode->hdisplay, mode->htotal, mode->vdisplay, mode->vtotal); in ns2501_mode_set()
H A Dintel_pm.c711 unsigned int htotal, in intel_wm_method2() argument
722 if (WARN_ON_ONCE(htotal == 0)) in intel_wm_method2()
723 htotal = 1; in intel_wm_method2()
725 ret = (latency * pixel_rate) / (htotal * 10000); in intel_wm_method2()
1101 int clock, htotal, cpp, width, wm; in g4x_compute_wm() local
1128 htotal = adjusted_mode->crtc_htotal; in g4x_compute_wm()
1136 wm = intel_wm_method2(clock, htotal, width, cpp, latency); in g4x_compute_wm()
1144 large = intel_wm_method2(clock, htotal, width, cpp, latency); in g4x_compute_wm()
1561 unsigned int htotal, in vlv_wm_method2() argument
1568 ret = intel_wm_method2(pixel_rate, htotal, in vlv_wm_method2()
[all …]
H A Dintel_bios.c119 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay + in fill_detail_timing_data()
150 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal) in fill_detail_timing_data()
151 panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1; in fill_detail_timing_data()
H A Dintel_sdvo.c821 h_blank_len = mode->htotal - mode->hdisplay; in intel_sdvo_get_dtd_from_mode()
873 mode.htotal = mode.hdisplay + dtd->part1.h_blank; in intel_sdvo_get_mode_from_dtd()
874 mode.htotal += (dtd->part1.h_high & 0xf) << 8; in intel_sdvo_get_mode_from_dtd()
H A Dintel_panel.c80 scan->htotal == fixed_mode->htotal && in intel_find_panel_downclock()
H A Dintel_hdmi.c1366 crtc_state->base.adjusted_mode.htotal > 5460) in hdmi_12bpc_possible()
/dflybsd-src/sys/dev/drm/amd/display/dc/dml/
H A Ddml1_display_rq_dlg_calc.c992 unsigned int htotal = e2e_pipe_param.pipe.dest.htotal; in dml1_rq_dlg_get_dlg_params() local
1137 disp_dlg_regs->refcyc_per_htotal = (unsigned int) (ref_freq_to_pix_freq * (double) htotal in dml1_rq_dlg_get_dlg_params()
1154 min_dst_y_ttu_vblank = min_ttu_vblank * pclk_freq_in_mhz / (double) htotal; in dml1_rq_dlg_get_dlg_params()
1206 line_time_in_us = (htotal / pclk_freq_in_mhz); in dml1_rq_dlg_get_dlg_params()
1272 if (dst_x_after_scaler >= htotal) { in dml1_rq_dlg_get_dlg_params()
1273 dst_x_after_scaler = dst_x_after_scaler - htotal; in dml1_rq_dlg_get_dlg_params()
1277 DTRACE("DLG: %s: htotal = %d", __func__, htotal); in dml1_rq_dlg_get_dlg_params()
1295 line_o = (double) dst_y_after_scaler + dst_x_after_scaler / (double) htotal; in dml1_rq_dlg_get_dlg_params()
1296 line_setup = (double) (vupdate_offset + vupdate_width + vready_offset) / (double) htotal; in dml1_rq_dlg_get_dlg_params()
1470 if (htotal <= 75) { in dml1_rq_dlg_get_dlg_params()
[all …]
H A Ddisplay_mode_structs.h293 unsigned int htotal; member
/dflybsd-src/sys/dev/drm/include/drm/
H A Ddrm_modes.h140 .htotal = (ht), .hskew = (hsk), .vdisplay = (vd), \
280 int htotal; member
425 (m)->hdisplay, (m)->hsync_start, (m)->hsync_end, (m)->htotal, \
/dflybsd-src/sys/dev/drm/amd/amdgpu/
H A Damdgpu_encoders.c152 unsigned hblank = native_mode->htotal - native_mode->hdisplay; in amdgpu_panel_mode_fixup()
165 adjusted_mode->htotal = native_mode->hdisplay + hblank; in amdgpu_panel_mode_fixup()
/dflybsd-src/sys/dev/drm/radeon/
H A Dradeon_encoders.c319 unsigned hblank = native_mode->htotal - native_mode->hdisplay; in radeon_panel_mode_fixup()
334 adjusted_mode->htotal = native_mode->hdisplay + hblank; in radeon_panel_mode_fixup()
H A Dradeon_legacy_crtc.c848 htotal_cntl = mode->htotal & 0x7; in radeon_set_pll()
H A Drs780_dpm.c65 if (crtc->mode.htotal && crtc->mode.vtotal) in rs780_get_pm_mode_parameters()
/dflybsd-src/sys/dev/drm/include/uapi/drm/
H A Ddrm_mode.h234 __u16 htotal; member
/dflybsd-src/sys/dev/video/bktr/
H A Dbktr_reg.h409 int htotal, hdelay, hactive; member
H A Dbktr_core.c3321 temp = ((quad_t ) fp->htotal* (quad_t) bktr->capture_area_x_size * 4096 in build_dma_prog()
3324 temp = ((quad_t ) fp->htotal* (quad_t) fp->scaled_hactive * 4096 in build_dma_prog()
/dflybsd-src/sys/dev/drm/amd/display/dc/inc/
H A Ddcn_calcs.h176 float htotal[number_of_planes_minus_one + 1]; member
/dflybsd-src/sys/dev/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm.c374 if (max_size < mode->htotal * mode->vtotal) in amdgpu_dm_fbc_init()
375 max_size = mode->htotal * mode->vtotal; in amdgpu_dm_fbc_init()
2494 native_mode->htotal == drm_mode->htotal && in decide_crtc_timing_for_drm_display_mode()
/dflybsd-src/sys/dev/drm/amd/display/dc/dcn10/
H A Ddcn10_hubp.c124 + pipe_dest->vupdate_offset) / pipe_dest->htotal) <= pipe_dest->vblank_end) { in hubp1_vready_workaround()

12