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Searched refs:dm_pp_clock_levels_with_latency (Results 1 – 5 of 5) sorted by relevance

/dflybsd-src/sys/dev/drm/amd/display/dc/
H A Ddm_services_types.h99 struct dm_pp_clock_levels_with_latency { struct
H A Ddm_services.h211 struct dm_pp_clock_levels_with_latency *clk_level_info);
/dflybsd-src/sys/dev/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_pp_smu.c250 struct dm_pp_clock_levels_with_latency *clk_level_info, in pp_to_dc_clock_levels_with_latency()
377 struct dm_pp_clock_levels_with_latency *clk_level_info) in dm_pp_get_clock_levels_by_type_with_latency()
/dflybsd-src/sys/dev/drm/amd/display/dc/dce120/
H A Ddce120_resource.c734 struct dm_pp_clock_levels_with_latency eng_clks = {0}; in bw_calcs_data_update_from_pplib()
735 struct dm_pp_clock_levels_with_latency mem_clks = {0}; in bw_calcs_data_update_from_pplib()
/dflybsd-src/sys/dev/drm/amd/display/dc/dce112/
H A Ddce112_resource.c940 struct dm_pp_clock_levels_with_latency eng_clks = {0}; in bw_calcs_data_update_from_pplib()
941 struct dm_pp_clock_levels_with_latency mem_clks = {0}; in bw_calcs_data_update_from_pplib()