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Searched refs:UVD_RBC_RB_CNTL__RB_NO_FETCH_MASK (Results 1 – 9 of 9) sorted by relevance

/dflybsd-src/sys/dev/drm/amd/include/asic_reg/uvd/
H A Duvd_7_0_sh_mask.h743 #define UVD_RBC_RB_CNTL__RB_NO_FETCH_MASK … macro
H A Duvd_4_0_sh_mask.h598 #define UVD_RBC_RB_CNTL__RB_NO_FETCH_MASK 0x00010000L macro
H A Duvd_4_2_sh_mask.h619 #define UVD_RBC_RB_CNTL__RB_NO_FETCH_MASK 0x10000 macro
H A Duvd_6_0_sh_mask.h683 #define UVD_RBC_RB_CNTL__RB_NO_FETCH_MASK 0x10000 macro
H A Duvd_5_0_sh_mask.h681 #define UVD_RBC_RB_CNTL__RB_NO_FETCH_MASK 0x10000 macro
/dflybsd-src/sys/dev/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h1220 #define UVD_RBC_RB_CNTL__RB_NO_FETCH_MASK … macro
/dflybsd-src/sys/dev/drm/amd/amdgpu/
H A Duvd_v5_0.c423 WREG32_P(mmUVD_RBC_RB_CNTL, 0, ~UVD_RBC_RB_CNTL__RB_NO_FETCH_MASK); in uvd_v5_0_start()
H A Dvcn_v1_0.c763 ~UVD_RBC_RB_CNTL__RB_NO_FETCH_MASK); in vcn_v1_0_start()
H A Duvd_v7_0.c1093 ~UVD_RBC_RB_CNTL__RB_NO_FETCH_MASK); in uvd_v7_0_start()