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Searched refs:UNIPHY_REG_TEST_OUTPUT__UNIPHY_TEST_VCTL_EN__SHIFT (Results 1 – 4 of 4) sorted by relevance

/dflybsd-src/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h9280 #define UNIPHY_REG_TEST_OUTPUT__UNIPHY_TEST_VCTL_EN__SHIFT 0x00000011 macro
H A Ddce_8_0_sh_mask.h4492 #define UNIPHY_REG_TEST_OUTPUT__UNIPHY_TEST_VCTL_EN__SHIFT 0x11 macro
H A Ddce_11_0_sh_mask.h11858 #define UNIPHY_REG_TEST_OUTPUT__UNIPHY_TEST_VCTL_EN__SHIFT 0x11 macro
H A Ddce_10_0_sh_mask.h12046 #define UNIPHY_REG_TEST_OUTPUT__UNIPHY_TEST_VCTL_EN__SHIFT 0x11 macro