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Searched refs:SQ_WAVE_IB_DBG0__ECC_ST__SHIFT (Results 1 – 7 of 7) sorted by relevance

/dflybsd-src/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h9895 #define SQ_WAVE_IB_DBG0__ECC_ST__SHIFT 0x00000016 macro
H A Dgfx_7_2_sh_mask.h12466 #define SQ_WAVE_IB_DBG0__ECC_ST__SHIFT 0x16 macro
H A Dgfx_8_0_sh_mask.h14336 #define SQ_WAVE_IB_DBG0__ECC_ST__SHIFT 0x18 macro
H A Dgfx_8_1_sh_mask.h14734 #define SQ_WAVE_IB_DBG0__ECC_ST__SHIFT 0x18 macro
/dflybsd-src/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h28391 #define SQ_WAVE_IB_DBG0__ECC_ST__SHIFT … macro
H A Dgc_9_1_sh_mask.h29731 #define SQ_WAVE_IB_DBG0__ECC_ST__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h30059 #define SQ_WAVE_IB_DBG0__ECC_ST__SHIFT … macro