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Searched refs:SPI_RESOURCE_RESERVE_CU_5__SGPR_MASK (Results 1 – 6 of 6) sorted by relevance

/dflybsd-src/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h8953 #define SPI_RESOURCE_RESERVE_CU_5__SGPR_MASK 0xf0 macro
H A Dgfx_8_0_sh_mask.h10573 #define SPI_RESOURCE_RESERVE_CU_5__SGPR_MASK 0xf0 macro
H A Dgfx_8_1_sh_mask.h10971 #define SPI_RESOURCE_RESERVE_CU_5__SGPR_MASK 0xf0 macro
/dflybsd-src/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h12338 #define SPI_RESOURCE_RESERVE_CU_5__SGPR_MASK … macro
H A Dgc_9_1_sh_mask.h13767 #define SPI_RESOURCE_RESERVE_CU_5__SGPR_MASK … macro
H A Dgc_9_2_1_sh_mask.h13632 #define SPI_RESOURCE_RESERVE_CU_5__SGPR_MASK … macro