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Searched refs:SPI_PS_INPUT_CNTL_16__CYL_WRAP__SHIFT (Results 1 – 7 of 7) sorted by relevance

/dflybsd-src/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h7807 #define SPI_PS_INPUT_CNTL_16__CYL_WRAP__SHIFT 0x0000000d macro
H A Dgfx_7_2_sh_mask.h8500 #define SPI_PS_INPUT_CNTL_16__CYL_WRAP__SHIFT 0xd macro
H A Dgfx_8_0_sh_mask.h9934 #define SPI_PS_INPUT_CNTL_16__CYL_WRAP__SHIFT 0xd macro
H A Dgfx_8_1_sh_mask.h10332 #define SPI_PS_INPUT_CNTL_16__CYL_WRAP__SHIFT 0xd macro
/dflybsd-src/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h15809 #define SPI_PS_INPUT_CNTL_16__CYL_WRAP__SHIFT … macro
H A Dgc_9_1_sh_mask.h17243 #define SPI_PS_INPUT_CNTL_16__CYL_WRAP__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h17118 #define SPI_PS_INPUT_CNTL_16__CYL_WRAP__SHIFT … macro