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Searched refs:RLC_PG_CNTL__DYN_PER_CU_PG_ENABLE_MASK (Results 1 – 7 of 7) sorted by relevance

/dflybsd-src/sys/dev/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h7226 #define RLC_PG_CNTL__DYN_PER_CU_PG_ENABLE_MASK 0x00000004L macro
H A Dgfx_7_2_sh_mask.h7843 #define RLC_PG_CNTL__DYN_PER_CU_PG_ENABLE_MASK 0x4 macro
H A Dgfx_8_0_sh_mask.h8745 #define RLC_PG_CNTL__DYN_PER_CU_PG_ENABLE_MASK 0x4 macro
H A Dgfx_8_1_sh_mask.h9297 #define RLC_PG_CNTL__DYN_PER_CU_PG_ENABLE_MASK 0x4 macro
/dflybsd-src/sys/dev/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h22939 #define RLC_PG_CNTL__DYN_PER_CU_PG_ENABLE_MASK … macro
H A Dgc_9_1_sh_mask.h24355 #define RLC_PG_CNTL__DYN_PER_CU_PG_ENABLE_MASK … macro
H A Dgc_9_2_1_sh_mask.h24408 #define RLC_PG_CNTL__DYN_PER_CU_PG_ENABLE_MASK … macro